MT8889CN Zarlink Semiconductor, Inc., MT8889CN Datasheet - Page 14

• Manufacturer Part Number: MT8889CN
• Description: Integrated DTMF Transceiver with Adaptive Micro Interface
• Manufacturer: Zarlink Semiconductor, Inc.

MC6800/6802
BIT
b0
b1
b2
b3
MC6809
A0-A15
A0-A15
D0-D3
D0-D3
VMA
R/W
RW
CP/DTMF
Figure 14 - a) & b) - MT8889 Interface Connections for Various Intel and Motorola Micros
Q
E
2
NAME
TOUT
RSEL
IRQ
(a)
Tone Output Control. A logic high enables the tone output; a logic low turns the tone output
off. This bit controls all transmit tone functions.
Call Progress or DTMF Mode Select. A logic high enables the receive call progress mode;
a logic low enables DTMF mode. In DTMF mode the device is capable of receiving and
transmitting DTMF signals. In CP mode a retangular wave representation of the received
tone signal will be present on the IRQ/CP output pin if IRQ has been enabled (control
register A, b2=1). In order to be detected, CP signals must be within the bandwidth
specified in the AC Electrical Characteristics for Call Progress.
Note: DTMF signals cannot be detected when CP mode is selected.
Interrupt Enable. A logic high enables the interrupt function; a logic low de-activates the
interrupt function. When IRQ is enabled and DTMF mode is selected (control register A,
b1=0), the IRQ/CP output pin will go low when either 1) a valid DTMF signal has been
received for a valid guard time duration, or 2) the transmitter is ready for more data (burst
mode only).
Register Select. A logic high selects control register B for the next write cycle to the
control register address. After writing to control register B, the following control register
write cycle will be directed to control register A.
Table 6 - Control Register A Description
CS
RS0
D0-D3
R/W/WR
DS/RD
CS
RS0
D0-D3
R/W/WR
DS/RD
MT8889
MT8889
Zarlink Semiconductor Inc.
MT8889C
14
DESCRIPTION
MC68HC11
8031/8051
8080/8085
AD0-AD3
A8-A15
A8-A15
ALE
WR
RW
RD
AS
DS
P0
(b)
CS
D0-D3
RS0
DS/RD
R/W/WR
CS
D0-D3
RS0
DS/RD
R/W/WR
MT8889C
MT8889C
Data Sheet