TS8388BMFS9QB2 Atmel Corporation, TS8388BMFS9QB2 Datasheet
TS8388BMFS9QB2
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TS8388BMFS9QB2 Summary of contents
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MAIN FEATURES 8-bit resolution. ADC gain adjust. 1.5 GHz full power input bandwidth. 1 Gsps (min) sampling rate. SINAD = 44.3 dB (7.2 Effective Bits) SFDR = 58 dBc @ Gsps MHz : S ...
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Product Specification 1. SIMPLIFIED BLOCK DIAGRAM ....................................................................................................................................3 2. FUNCTIONAL DESCRIPTION ........................................................................................................................................3 3. SPECIFICATIONS ..............................................................................................................................................................4 3.1. ABSOLUTE MAXIMUM RATINGS (SEE NOTES BELOW).................................................................................................................... 4 3.2. RECOMMENDED CONDITIONS OF USE ............................................................................................................................................. 4 3.3. ELECTRICAL OPERATING CHARACTERISTICS................................................................................................................................. 5 3.4. TIMING DIAGRAMS................................................................................................................................................................................ 9 3.5. EXPLANATION ...
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SIMPLIFIED BLOCK DIAGRAM MASTER/SLAVE TRACK & HOLD VIN,VINB G=2 T/H CLOCK CLK, CLKB BUFFER DRRB DR,DRB 2. FUNCTIONAL DESCRIPTION The TS8388BFS bit 1GSPS ADC based on an advanced high speed bipolar technology featuring a cutoff frequency ...
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Product Specification 3. SPECIFICATIONS 3.1. ABSOLUTE MAXIMUM RATINGS (SEE NOTES BELOW) Parameter Positive supply voltage Digital negative supply voltage Digital positive supply voltage Negative supply voltage Maximum difference between negative supply voltages Analog input voltages Maximum difference between V and ...
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ELECTRICAL OPERATING CHARACTERISTICS VEE = DVEE = - Digital outputs Ω differentially terminated ; Tj (typical) = 70°C. Full Temperature Range –55°C<Tc; Tj<+125°C. Parameter ...
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Product Specification Parameter DIGITAL OUTPUTS (notes 1,6) Single ended or differential input mode clock duty cycle (CLK,CLKB), Binary output data format, Tj (typical) = 70°C. Logic compatibility for digital outputs ( Depending on the value of V PLUSD ...
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Parameter TRANSIENT PERFORMANCE Bit Error Rate Gsps Fin = 62.5 MHz ADC settling time 400 mVpp In inB Overvoltage recovery time AC PERFORMANCE Single ended or differential input and clock mode clock ...
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Product Specification Parameter SWITCHING PERFORMANCE AND CHARACTERISTICS – See Timing Diagrams Figure 1, Figure 2 Maximum clock frequency Minimum clock frequency Minimum Clock pulse width (high) Minimum Clock pulse width (low) Aperture delay Aperture uncertainty Data output delay Output rise/fall ...
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TIMING DIAGRAMS ( IN, INB N-1 (CLK, CLKB) 1360 ps DIGITAL 1000 ps OUTPUTS TDR = 1320 ps Data Ready (DR, DRB) DRRB Figure 1 : TS8388BFS TIMING DIAGRAM ( 1 GSPS CLOCK RATE ) (V ...
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Product Specification 3.5. EXPLANATION OF TEST LEVELS 1 100% production tested at +25°C 2 100 % production tested at +25°C 3 Sample tested only at specified temperatures 4 Parameter is guaranteed by design and characterization testing (thermal steady-state conditions at ...
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PACKAGE DESCRIPTION. 4.1. TS8388BFS PIN DESCRIPTION Symbol Pin number GND 5, 13, 27, 28, 34, 35, 36, 41, 42, 43, 50, 51, 52, 53, 58 16, 17, 18, 68 PLUSD V 26, 29, 32, 33, ...
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Product Specification 4.2. TS8388BFS PINOUT TOP VIEW : VPLUSD D2 D2B D1 D1B D0 D0B TS8388BFS 12 VPLUSD D6B D6 D7B D7 ORB OR ...
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OUTLINE DIMENSIONS – 68 PINS CQFP 68 pins Ceramic Quad Flat Pack 0.8 BCS 20.32 BSC 0.050 BCS 1.27 BSC . o Pin N 1 index CQFP 68 .950 ± .006 24.13 ± 0.152 1.133 – 1.147 28,78 – ...
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Product Specification 4.4. THERMAL CHARACTERISTICS 4.4.1. E CQFP NHANCED The CQFP68 has been modified, in order to improve the thermal characteristics : A CuW heatspreader has been added at the bottom of the package. The die has been electrically isolated ...
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TYPICAL CHARACTERIZATION RESULTS 5.1. STATIC LINEARITY – MSPS / FIN = 10 MHZ 5.1. NTEGRAL ON INEARITY LSB 5.1. IFFERENTIAL ON INEARITY LSB code Clock Frequency = 50Msps Signal Frequency ...
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Product Specification 5.2. EFFECTIVE NUMBER OF BITS VERSUS POWER SUPPLIES VARIATION Effective number of bits = f (VEEA 500 MSPS ; Fin = 100 MHz Effective number ...
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TYPICAL FFT RESULTS 5.3 = SPS 5.3. GSPS 495 H12 H2 H14 5.3. GSPS, F ...
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Product Specification 5.4. SPURIOUS FREE DYNAMIC RANGE VERSUS INPUT AMPLITUDE 5.4.1. SAMPLING FREQUENCY Full Scale ENOB = 6 4 TS8388BFS =995 MH SPS NPUT FREQUENCY GSPS Fin ...
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Full Scale GSPS Fin = 995 MHz ENOB = 6.6 SINAD = 40.8 dB SFDR = -50 dBc H3 H2 (-3 dB Full Scale) THD = -48dBc SNR = 44dB Product Specification TS8388BFS SFDR = -50dBc ...
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Product Specification 5.5. DYNAMIC PERFORMANCE VERSUS ANALOG INPUT FREQUENCY Fs=1 Gsps, Fin = 1600 MHz, Full Scale input (FS Clock duty cycle 50 / 50, Binary/Gray output coding, fully differential or single-ended analog and ...
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EFFECTIVE NUMBER OF BITS (ENOB) VERSUS SAMPLING FREQUENCY Analog Input Frequency : Fin = 495 MHz and Nyquist conditions ( Fin = Clock duty cycle Binary output coding ...
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Product Specification 5.8. TS8388BFS ADC PERFORMANCES VERSUS JUNCTION TEMPERATURE Effective number of bits versus junction temperature GSPS ; Fin = 500 MHz ; Duty cycle = 50 -40 -20 0 Signal ...
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Power consumption versus junction temperature 500 cycl 5.9. ...
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Product Specification 5.10. ADC STEP RESPONSE Test pulse input characteristics : 20% to 80% input full scale and rise time ~ 200ps. Note : This step response was obtained with the TSEV8388B chip on board (device in die form). 5.10.1. ...
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DEFINITION OF TERMS (BER) Bit Error Rate (BW) Full power input bandwidth (SINAD) Signal to noise and distortion ratio (SNR) Signal to noise ratio (THD) Total harmonic distorsion (SFDR) Spurious free dynamic range (ENOB) Effective Number Of Bits (DNL) ...
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Product Specification (TF) Fall time (PSRR) Power supply rejection ratio (NRZ) Non return to zero InterModulation Distortion The two tones intermodulation distortion ( IMD ) rejection is the ratio of either input tone to the (IMD) (NPR) Noise Power Ratio ...
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TS8388BFS MAIN FEATURES 7.1. TIMING INFORMATIONS 7.1.1. T TS8388BFS IMING VALUE FOR Timing values as defined in 3.3 are advanced data, issuing from electric simulations and first characterizations results fitted with measurements. Timing values are given at CQFP68 package ...
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Product Specification 7.2. PRINCIPLE OF DATA READY SIGNAL CONTROL BY DRRB INPUT COMMAND 7.2.1. DATA READY OUTPUT SIGNAL RESET The Data Ready signal is reset on falling edge of DRRB input command, on ECL logical low level (-1.8V). DRRB may ...
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This is true so long as the out of phase analog input pin VINB is 50 ohms terminated very closely to one of the neighboring shield ground pins (52, 53, 58, 59) which constitute the local ground reference for the ...
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Product Specification Single ended Clock input (Ground common mode) VCLK common mode = 0 Volt VCLKB=0 Volt 4 dBm typical clock input power level (into 50 ohms termination resistor) [V] VCLK +0.5V -0.5V Note not exceed 10 ...
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VCLK -0.8V -1.8V TS8388BFS VCLKB = -1 Product Specification 31 ...
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Product Specification 7.5. NOISE IMMUNITY INFORMATIONS Circuit noise immunity performance begins at design level. Efforts have been made on the design in order to make the device as insensitive as possible to chip environment perturbations resulting from the circuit itself ...
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DIFFERENTIAL OUTPUT LOADING CONFIGURATIONS ( VPLUSD = 0V -0.8V 75 Ω 75 Ω DVEE Figure 3 : DIFFERENTIAL OUTPUT : 75 Ω TERMINATED VPLUSD = 0V -0.8V 75 Ω 75 Ω ...
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Product Specification VPLUSD = 2.4V 1.6V 75 Ω DVEE VPLUSD = 2.4V 1.6V 75 Ω DVEE 7.7. OUT OF RANGE BIT An Out of Range (OR,ORB) bit is provided that goes to logical high ...
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Data Ready Reset input command). The operating die junction temperature must be kept below145 C, therefore an adequate cooling system has to be set up. The diode mounted transistor measured Vbe value versus junction temperature is ...
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Product Specification 7.10. ADC GAIN CONTROL PIN 60 The ADC gain is adjustable by the means of the pin 60 (input impedance is 1MΩ in parallel with 2pF) The gain adjust transfert function is given below : 1,20 1,15 1,10 ...
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EQUIVALENT INPUT / OUTPUT SCHEMATICS 8.1. EQUIVALENT ANALOG INPUT CIRCUIT AND ESD PROTECTIONS VCC=+5V -0.8V GND=0V -5.8V 50 Ω VEE E21V VIN Pad capacitance 340fF 5.8V 0.8V Note : the ESD protection equivalent capacitance is 150 fF. 8.2. EQUIVALENT ...
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Product Specification 8.3. EQUIVALENT DATA OUTPUT BUFFER CIRCUIT AND ESD PROTECTIONS VEE OUT Pad capacitance 180 fF VEE=-5V Note : the ESD protection equivalent capacitance is 150 fF. 8.4. ADC GAIN ADJUST EQUIVALENT INPUT CIRCUITS AND ESD PROTECTIONS VCC=+5V NP1032C2 ...
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GORB EQUIVALENT INPUT SCHEMATIC AND ESD PROTECTIONS GORB: gray or binary select input; floating or tied to VCC -> binary VEE GORB Pad capacitance 180fF VEE=-5V Note : the ESD protection equivalent capacitance is 150 fF. 8.6. DRRB EQUIVALENT ...
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Product Specification 9. TSEV8388BFS : DEVICE EVALUATION BOARD For complete specification, see separate TSEV8388BFS document. GENERAL DESCRIPTION The TSEV8388BFS Evaluation Board (CEB board which has been designed in order to facilitate the evaluation and the characterization of the ...
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ORDERING INFORMATION 10.1. PACKAGE DEVICE Manufacturer prefix Device or family Temperature range : M : -55 < < 125°C Package : FS : Enhanced Rth CQFP68 gullwing 10.2. EVALUATION BOARD Prototype board Evaluation board prefix The ...
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... Atmel Corporation 2001. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...