AD5232 Analog Devices, AD5232 Datasheet - Page 15

• Manufacturer Part Number: AD5232
• Description: 2-Channel/ 256-Position Digital Potentiometer
• Manufacturer: Analog Devices

Flash/EEMEM Reliability
The Flash/EE Memory array on the AD5232 is fully qualified
for two key Flash/EE memory characteristics, namely Flash/EE
Memory Cycling Endurance and Flash/EE Memory Data
Retention.
OFFSET
OFFSET
GND
GND
V
IN
V
IN
V
DUT
V
~
DUT
DD
SS
B
~
W
GND
OFFSET BIAS
C
V
DUT
NC
TA
IN
2.5V
= 20 log [ V
~
A
NC
NC
I
RDAC
A1
W1
SW
A
B
B
A
NC = NO CONNECT
W
DUT
B1 V
V
W
CODE = OO
SS
W
1
R
SW
TO V
V
OUT
SS
DD
B
=
OP279
DD
RDAC
/ V
I
0.1V
CM
I
SW
IN
5V
OP42
W2
B2
V
A2
H
]
+15V
–15V
CM
2
+
_
0.1V
V
OUT
V
OUT
V
OUT
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many Program, Read, and Erase cycles. In real
terms, a single endurance cycle is composed of four indepen-
dent, sequential events. These events are defined as:
During reliability qualification Flash/EE memory is cycled from
00
limit of the on-chip Flash/EE memory.
As indicated in the specification pages of this data sheet, the
AD5232 Flash/EE Memory Endurance qualification has been
carried out in accordance with JEDEC Specification A117 over
the industrial temperature range of –40 C to +85 C. The results
allow the specification of a minimum endurance figure over supply
and temperature of 100,000 cycles, with an endurance figure of
700,000 cycles being typical of operation at 25 C.
Retention quantifies the ability of the Flash/EE memory to retain
its programmed data over time. Again, the AD5232 has been
qualified in accordance with the formal JEDEC Retention Life-
time Specification (A117) at a specific junction temperature
(T
memory is cycled to its specified endurance limit described above,
before data retention is characterized. This means that the Flash/EE
memory is guaranteed to retain its data for its full-specified reten-
tion lifetime every time the Flash/EE memory is reprogrammed. It
should also be noted that retention lifetime, based on an activa-
tion energy of 0.6 eV, will derate with T
H
J
= 55 C). As part of this qualification procedure, the Flash/EE
to FF
a. Initial page erase sequence
b. Read/verify sequence
c. Byte program sequence
d. Second read/verify sequence
300
250
200
150
100
50
0
40
H
until a first fail is recorded, signifying the endurance
50
T
J
60
JUNCTION TEMPERATURE – C
ADI TYPICAL
PERFORMANCE
AT
T
J
= 55 C
70
80
J
as shown in Figure 23.
90
AD5232
100
110