AD5232

Manufacturer Part NumberAD5232
Description2-Channel/ 256-Position Digital Potentiometer
ManufacturerAnalog Devices
AD5232 datasheet
 
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AD5232
Pin
Number
Mnemonic
Description
1
CLK
Serial Input Register Clock Pin. Shifts in one bit at a time on positive clock edges.
2
SDI
Serial Data Input Pin. MSB Loaded First.
3
SDO
Serial Data Output Pin. Open Drain Output requires external pull-up resistor. Commands 9 and 10
activate the SDO output. See Table II. Other commands shift out the previously loaded SDI bit
pattern delayed by 16 clock pulses. This allows daisy-chain operation of multiple packages.
4
GND
Ground Pin, Logic Ground Reference.
5
V
Negative Supply. Connect to zero volts for single supply applications.
SS
6
A1
A Terminal of RDAC1
7
W1
Wiper Terminal of RDAC1, ADDR(RDAC1) = 0
8
B1
B Terminal of RDAC1
9
B2
B Terminal of RDAC2
10
W2
Wiper Terminal of RDAC2, ADDR(RDAC2) = 1
11
A2
A Terminal of RDAC2
12
V
Positive Power Supply Pin
DD
WP
Write Protect Pin. When active low, WP prevents any changes to the present register contents, except
13
PR and CMD 1 and 8 will refresh RDAC register from EEMEM. Execute a NOP instruction before
returning WP to logic high.
PR
14
Hardware Override Preset Pin. Refreshes the scratch pad register with current contents of the EEMEM
register. Factory default loads midscale 80
(PR is activated at the logic high transition).
CS
Serial Register Chip Select Active Low. Serial register operation takes place when CS returns to logic high.
15
16
RDY
Ready. Active-high open drain output, requires pull-up resistor. Identifies completion of commands
2, 3, 8, 9, 10, and PR.
PIN CONFIGURATION
CLK
RDY
1
16
CS
SDI
15
2
PR
SDO
3
14
AD5232
WP
GND
4
13
TOP VIEW
V
12
V
5
(Not to Scale)
SS
DD
A1
11
A2
6
W2
W1
7
10
B1
B2
8
9
PIN FUNCTION DESCRIPTIONS
H
H
until EEMEM is loaded with a new value by the user
H