S29WS128J SPANSION, S29WS128J Datasheet

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S29WS128J

Manufacturer Part Number
S29WS128J
Description
(S29WS064J / S29WS128J) Burst Mode Flash Memory
Manufacturer
SPANSION
Datasheet

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Part Number:
S29WS128J0PBFW010
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Distinctive Characteristics
S29WS128J/064J
128/64 Megabit (8/4 M x 16-Bit)
CMOS 1.8 Volt-only Simultaneous Read/Write,
Burst Mode Flash Memory
Data Sheet
Publication Number S29WS-J_00
Revision A
Amendment 4
Issue Date June 24, 2005

Related parts for S29WS128J

S29WS128J Summary of contents

Page 1

... S29WS128J/064J 128/64 Megabit (8 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory Data Sheet Distinctive Characteristics „ „ „ „ „ „ „ „ „ „ „ Publication Number S29WS-J_00 „ „ „ „ „ „ „ „ „ ...

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... Notice On Data Sheet Designations S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... General Description Bank June 24, 2005 S29WS-J_00_A4 Quantity 128Mb 64 Mb S29WS128J/064J Size 3 ...

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June 24, 2005 S29WS-J_00_A4 ...

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Table of Contents Notice On Data Sheet Designations . . . . . . . . . . . 2 Advance Information .......................................................................................2 Preliminary ..........................................................................................................2 Combination .......................................................................................................2 Full Production (No Designation on Document) ...................................2 Product Selector Guide . . . ...

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Commercial (C) Devices ............................................................................. 70 Wireless (W) Devices .................................................................................. 70 Industrial (I) Devices ..................................................................................... 70 Supply Voltages ............................................................................................... 70 DC Characteristics . . . . . . . . . . . . . . . . . . . ...

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... Product Selector Guide Synchronous/Burst Speed Option Block Diagram June 24, 2005 S29WS-J_00_A4 MHz 66 MHz (Note) S29WS128J/064J Asynchronous 80 MHz Speed Option 66 MHz (Note) 7 ...

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... Amax–A0 Amax– Bank A Address Bank A X-Decoder Bank B Address Bank B X-Decoder Status Control X-Decoder Bank C Bank C Address X-Decoder Bank D Address Bank D S29WS128J/064J DQ15–DQ0 OE# DQ15–DQ0 DQ15–DQ0 DQ15–DQ0 DQ15–DQ0 S29WS-J_00_A4 June 24, 2005 ...

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... G5 G6 DQ9 DQ3 DQ4 DQ13 RFU DQ12 DQ10 DQ2 DQ5 DQ11 RFU RFU V RFU RFU CC S29WS128J/064J RFU RFU A11 RFU A12 A15 A13 A21 A14 RFU RFU A16 G7 G8 ...

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... DQ9 DQ3 DQ4 DQ13 RFU DQ12 DQ10 DQ2 DQ5 DQ11 RFU RFU V RFU RFU CC S29WS128J/064J A10 RFU RFU RFU A8 A11 A12 A15 A13 A21 A14 A22 ...

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... Input/Output Descriptions June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 11 ...

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... Logic Symbol S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Ordering Information ### J ## June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 13 ...

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... Boot Temperature Burst Speed Protect ° ° ° ° Burst Boot Temperature Speed Protect ° ° ° ° ° ° ° ° S29WS128J/064J Package Package Type Material Set Package Package Type Material Set S29WS-J_00_A4 June 24, 2005 ...

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... Legend Logic Logic Don’t Care Requirements for Asynchronous ReadOperation (Non-Burst) Requirements for Synchronous (Burst) Read Operation June 24, 2005 S29WS-J_00_A4 Table 1. Device Bus Operations CE# OE# WE# A22–0 S29WS128J/064J CLK DQ15–0 RESET# AVD# (See Note) 15 ...

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... Mode Table 2. Burst Address Groups Group Size Group Address Ranges S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Configuration Register Handshaking Simultaneous Read/Write Operations with Zero Latency Writing Commands/Command Sequences June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 17 ...

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... Accelerated Program Operation Autoselect Mode S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Table 3. Autoselect Codes (High Voltage Method) Manufacturer ID: Spansion Read Cycle 1 Read Cycle 2 Read Cycle 3 Sector Protection Verification Indicator Bits Hardware Sector Group Protection Sector/Sector Block Protection and Unprotection Table 4. S29WS128J/064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 19 ...

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... Table 4. S29WS128J/064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Table 4. S29WS128J/064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 21 ...

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... Table 5. S29WS064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Table 5. S29WS064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 23 ...

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... PPB N-1 PPB Sector Protected Sector Unprotected. 5. PPBs programmed individually, but cleared collectively Figure 1. Advanced Sector Protection/Unprotection S29WS128J/064J Persistent Method (DQ1) 1. Bit is volatile, and defaults to “1” on reset. 2. Programming to “0” locks all PPBs to their current state. 3. Once programmed to “0”, requires hardware reset to unlock ...

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... Lock Register „ „ Device DQ15-05 Persistent Protection Bits June 24, 2005 S29WS-J_00_A4 Table 6. Lock Register DQ4 DQ3 S29WS128J/064J DQ2 DQ1 DQ0 25 ...

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... S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Read Byte Twice Addr = SA0 No DQ6 = Toggle? Yes No DQ5 = 1? Wait 500 µs Yes Read Byte Twice Addr = SA0 No Read Byte. DQ6 = Toggle? Addr = SA Yes DQ0 = No '1' (Erase) '0' (Pgm.)? FAIL Issue Reset PASS Command Exit PPB Command Set Figure 2. PPB Program/Erase Algorithm S29WS128J/064J Yes 27 ...

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... Persistent Protection Bit Lock Bit Password Protection Method S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Program Data (PD): See text for Lock Register definitions Caution: once. Wait 4 µs Perform Polling Algorithm (see Write Operation Status flowchart) Done DQ5 = 1? Error condition (Exceeded Timing Limits) Yes FAIL. Write rest command to return to reading array. Figure 3. Lock Register Program Algorithm S29WS128J/064J Lock register can only be progammed 29 ...

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... Advanced Sector Protection Software Examples Unique Device PPB Lock Bit 0 = locked 1 = unlocked Hardware Data Protection Methods „ „ Table 7. Sector Protection Schemes Sector PPB Sector DYB 0 = protected 0 = protected 1 = unprotected 1 = unprotected S29WS128J/064J Sector Protection Status S29WS-J_00_A4 June 24, 2005 ...

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... Common Flash Memory Interface (CFI) Addresses Data June 24, 2005 S29WS-J_00_A4 Table 8. CFI Query Identification String S29WS128J/064J Description 31 ...

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... Addresses Data Addresses Data Table 9. System Interface String à Table 10. Device Geometry Definition S29WS128J/064J Description à Description S29WS-J_00_A4 June 24, 2005 ...

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... Table 11. Primary Vendor-Specific Extended Query Addresses Data June 24, 2005 S29WS-J_00_A4 Description S29WS128J/064J 33 ...

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... Table 12. WS128J Sector Address Table (Sheet Sector Sector Size S29WS128J/064J (x16) Address Range S29WS-J_00_A4 June 24, 2005 ...

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... Table 12. WS128J Sector Address Table (Sheet Sector June 24, 2005 S29WS-J_00_A4 Sector Size S29WS128J/064J (x16) Address Range 35 ...

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... Table 12. WS128J Sector Address Table (Sheet Sector Sector Size S29WS128J/064J (x16) Address Range S29WS-J_00_A4 June 24, 2005 ...

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... Table 12. WS128J Sector Address Table (Sheet Sector June 24, 2005 S29WS-J_00_A4 Sector Size S29WS128J/064J (x16) Address Range 37 ...

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... Table 12. WS128J Sector Address Table (Sheet Sector Sector Size S29WS128J/064J (x16) Address Range S29WS-J_00_A4 June 24, 2005 ...

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... Table 12. WS128J Sector Address Table (Sheet Sector June 24, 2005 S29WS-J_00_A4 Sector Size S29WS128J/064J (x16) Address Range 39 ...

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... Table 12. WS128J Sector Address Table (Sheet Sector Sector Size S29WS128J/064J (x16) Address Range S29WS-J_00_A4 June 24, 2005 ...

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... Table 12. WS128J Sector Address Table (Sheet Sector June 24, 2005 S29WS-J_00_A4 Sector Size S29WS128J/064J (x16) Address Range 41 ...

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... Table 13. WS064J Sector Address Table (Sheet Sector Sector Size S29WS128J/064J (x16) Address Range S29WS-J_00_A4 June 24, 2005 ...

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... Table 13. WS064J Sector Address Table (Sheet Sector June 24, 2005 S29WS-J_00_A4 Sector Size S29WS128J/064J (x16) Address Range 43 ...

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... Table 13. WS064J Sector Address Table (Sheet Sector Sector Size S29WS128J/064J (x16) Address Range S29WS-J_00_A4 June 24, 2005 ...

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... Table 13. WS064J Sector Address Table (Sheet Sector June 24, 2005 S29WS-J_00_A4 Sector Size S29WS128J/064J (x16) Address Range 45 ...

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... Table 13. WS064J Sector Address Table (Sheet Sector Sector Size S29WS128J/064J (x16) Address Range S29WS-J_00_A4 June 24, 2005 ...

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... Table 13. WS064J Sector Address Table (Sheet Sector Command Definitions Reading Array Data June 24, 2005 S29WS-J_00_A4 Sector Size S29WS128J/064J (x16) Address Range 47 ...

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... Set Configuration Register Command Sequence S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

Page 49

... June 24, 2005 S29WS-J_00_A4 Power-up/ Hardware Reset Asynchronous Read Mode Only Set Burst Mode Set Burst Mode Configuration Register Configuration Register Command for Command for Synchronous Mode Asynchronous Mode (A19 = 0) (A19 = 1) Synchronous Read Mode Only Figure 4. Synchronous/Asynchronous State Diagram S29WS128J/064J 49 ...

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... Table 14. Programmable Wait State Settings A14 Table 15. Wait States for Standard wait-state Handshaking Burst Mode A13 A12 Total Initial Access Cycles Typical No. of Clock Cycles after AVD# Low 66 MHz S29WS128J/064J 80 MHz S29WS-J_00_A4 June 24, 2005 ...

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... Burst Modes Configuration Register June 24, 2005 S29WS-J_00_A4 Table 16. Read Mode Settings A16 S29WS128J/064J Address Bits A15 51 ...

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... Address Bit Function Settings (Binary) Reset Command Autoselect Command Sequence Table 17. Configuration Register S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Description Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Sequence June 24, 2005 S29WS-J_00_A4 Address S29WS128J/064J Read Data 53 ...

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... Program Command Sequence S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Chip Erase Command Sequence June 24, 2005 S29WS-J_00_A4 START Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? Yes No Increment Address Last Address? Yes Programming Completed Figure 5. Program Operation S29WS128J/064J No 55 ...

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... Sector Erase Command Sequence Erase Suspend/Erase Resume Commands S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... June 24, 2005 S29WS-J_00_A4 START Write Erase Command Sequence Data Poll from System Embedded Erase algorithm in progress No Data = FFh? Yes Erasure Completed Figure 6. Erase Operation S29WS128J/064J 57 ...

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... Password Program Command Password Verify Command Password Protection Mode Locking Bit Program Command Persistent Sector Protection Mode Locking Bit Program Command S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... Secured Silicon Sector Protection Bit Program Command PPB Lock Bit Set Command DPB Write/Erase/Status Command Password Unlock Command June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 59 ...

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... PPB Program Command All PPB Erase Command PPB Status Command PPB Lock Bit Status Command S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

Page 61

... June 24, 2005 S29WS-J_00_A4 Table 18. Command Definitions Bus Cycles (Notes 1–6) First Second Third Addr Data Addr Data Addr Data Addr Sector Protection Command Definitions S29WS128J/064J Fourth Fifth Sixth Seventh Data Addr Data Addr Data Addr Data 61 ...

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... Command Sequence (Note Bus Cycles (Notes 1–6) First Second Third Addr Data Addr Data Addr Data Addr S29WS128J/064J Fourth Fifth Sixth Seventh Data Addr Data Addr Data Addr S29WS-J_00_A4 June 24, 2005 Data ...

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... HH Write Operation Status DQ7: Data# Polling June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 63 ...

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... RDY: Ready START Read DQ7–DQ0 Addr = VA Yes DQ7 = Data DQ5 = 1? Yes Read DQ7–DQ0 Addr = VA Yes DQ7 = Data? No PASS FAIL Figure 7. Data# Polling Algorithm S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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... DQ6: Toggle Bit I June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 65 ...

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... DQ2: Toggle Bit START Read Byte (DQ0-DQ7) Address = VA Read Byte (DQ0-DQ7) Address = VA No DQ6 = Toggle? Yes No DQ5 = 1? Yes Read Byte Twice (DQ 0-DQ7) Adrdess = VA No DQ6 = Toggle? Yes FAIL Figure 8. Toggle Bit Algorithm S29WS128J/064J PASS S29WS-J_00_A4 June 24, 2005 ...

Page 67

... If device is and the system reads Reading Toggle Bits DQ6/DQ2 DQ5: Exceeded Timing Limits June 24, 2005 S29WS-J_00_A4 Table 19. DQ6 and DQ2 Indications then DQ6 S29WS128J/064J and DQ2 67 ...

Page 68

... DQ3: Sector Erase Timer Status Table 20. Write Operation Status DQ7 DQ6 (Note 2) (Note S29WS128J/064J DQ5 DQ2 DQ3 RDY (Note 1) (Note 2) S29WS-J_00_A4 June 24, 2005 5) ...

Page 69

... Absolute Maximum Ratings June 24, 2005 S29WS-J_00_A4 Figure 9. Maximum Negative Overshoot Waveform Figure 10. Maximum Positive Overshoot Waveform S29WS128J/064J 69 ...

Page 70

... Operating Ranges S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

Page 71

... DC Characteristics CMOS Compatible Parameter Description June 24, 2005 S29WS-J_00_A4 Test Conditions Notes: 1 S29WS128J/064J Min Typ Max Unit 71 ...

Page 72

... Waveform Switching Waveforms V CC All Inputs and Outputs 0 Figure 11. Test Setup Table 21. Test Specifications All Speed Options Inputs Input V /2 Measurement Level CC Figure 12. Input Waveforms and Measurement Levels S29WS128J/064J Unit Outputs V /2 Output CC S29WS-J_00_A4 June 24, 2005 ...

Page 73

... RESET# CLK Characterization Parameter Description CLK t CR June 24, 2005 S29WS-J_00_A4 Test Setup t VCS Figure 13. V Power-up Diagram CC 80 MHz 66 MHz (WaitState=6,7) t CLK Figure 14. CLK Characterization S29WS128J/064J Speed Unit 80 MHz (WaitState less than 5) Unit Condition ...

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... Synchronous/Burst Read Parameter JEDEC Standard Description S29WS128J/064J 80 MHz 66 MHz Unit (WS064J only) S29WS-J_00_A4 June 24, 2005 ...

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... CR Hi-Z RDY Figure 15. CLK Synchronous Burst Mode Read (rising active CLK) June 24, 2005 S29WS-J_00_A4 cycles for initial access shown IACC t ACC t OE S29WS128J/064J t CEZ 7 t BDH t BACC OEZ t RACC Hi-Z t RDYS Hi-Z 75 ...

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... AVD t Da IACC t ACC t t RACC OE 7 cycles for initial access shown IACC t ACC t OE Figure 17. Synchronous Burst Mode Read S29WS128J/064J t CEZ t BDH t BACC Hi OEZ Hi-Z t RDYS t CEZ BACC BDH OEZ ...

Page 77

... IACC t BDH t RACC t RDYS Figure 18. 8-word Linear Burst with Wrap Around 6 wait cycles for initial access shown IACC t RACC RDYS S29WS128J/064J t BACC CEZ t BACC Da+1 Da+2 Da BDH OEZ t RACC Hi-Z Hi-Z 77 ...

Page 78

... Parameter JEDEC Standard CE# OE# WE# Data Addresses AVD# Figure 20. Asynchronous Mode Read with Latched Addresses Description OEH t CE Valid RD t ACC AAVDH CAS t AVDP t AAVDS S29WS128J/064J 80 MHz 66 MHz Unit (WS064J only) t OEZ S29WS-J_00_A4 June 24, 2005 ...

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... CE# OE# WE# Data Addresses AVD# Hardware Reset (RESET#) Parameter JEDEC Std June 24, 2005 S29WS-J_00_A4 OEH ACC RA Figure 21. Asynchronous Mode Read Description S29WS128J/064J t OEZ Valid RD All Speed Options Unit 79 ...

Page 80

... CE#, OE# RESET# CE#, OE# RESET Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 22. Reset Timings S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

Page 81

... Erase/Program Operations Parameter JEDEC Standard June 24, 2005 S29WS-J_00_A4 Description S29WS128J/064J 80 MHz 66 MHz Unit (WS064J only) 81 ...

Page 82

... AS Addresses 555h Data A0h CE VCS V CC Figure 23. Asynchronous Program Operation Timings: AVD# Latched Addresses WPH t WC S29WS128J/064J Read Status Data Complete Progress t WHWH1 S29WS-J_00_A4 June 24, 2005 ...

Page 83

... Addresses 555h Data t CAS t AVSW CE# OE WE# t VCS V CC Figure 24. Asynchronous Program Operation Timings: WE# Latched Addresses June 24, 2005 S29WS-J_00_A4 A0h WPH t WC S29WS128J/064J Read Status Data Complete Progress t WHWH1 83 ...

Page 84

... Addresses 555h Data t CAS t AVSW CE# OE WE# t VCS V CC Figure 25. Synchronous Program Operation Timings: WE# Latched Addresses A0h WPH t WC S29WS128J/064J Read Status Data Complete Progress t WHWH1 S29WS-J_00_A4 June 24, 2005 ...

Page 85

... Data t CAS CE# OE# t CSW t WP WE# t VCS V CC Figure 26. Synchronous Program Operation Timings: CLK Latched Addresses June 24, 2005 S29WS-J_00_A4 A0h WPH t WC S29WS128J/064J Read Status Data Complete Progress t WHWH1 85 ...

Page 86

... CE VCS 555h for 10h for chip erase chip erase 30h WPH t WC Figure 27. Chip/Sector Erase Command Sequence S29WS128J/064J Read Status Data Complete Progress t WHWH2 S29WS-J_00_A4 June 24, 2005 ...

Page 87

... Figure 28. Accelerated Unlock Bypass Programming Timing AVD CE OE# t OEH WE# t ACC Addresses VA Data Figure 29. Data# Polling Timings (During Embedded Algorithm) June 24, 2005 S29WS-J_00_A4 A0h Don't Care t VIDS t VID t CEZ t OEZ Status Data S29WS128J/064J PA PD Don't Care VA Status Data 87 ...

Page 88

... Figure 30. Toggle Bit Timings (During Embedded Algorithm) CE# CLK AVD# Addresses V A OE# t Data RDY Figure 31. Synchronous Data Polling Timings/Toggle Bit Timings Status Data V A IACC Status Data S29WS128J/064J t CEZ VA Status Data t IACC Status Data S29WS-J_00_A4 June 24, 2005 t OEZ ...

Page 89

... Description V ID RESET VIDR CE# WE# RDY June 24, 2005 S29WS-J_00_A4 Figure 32. DQ2 vs. DQ6 Program or Erase Command Sequence t RSP Figure 33. Temporary Sector Unprotect Timing Diagram S29WS128J/064J All Speed Options Unit VIDR t RRB 89 ...

Page 90

... Sector Unprotect: 1.5 ms C62 C63 C63 C63 RACC latency t t RACC RACC latency D61 D62 D63 Figure 35. Latency with Boundary Crossing S29WS128J/064J Valid* Valid* Verify 40h Status C63 C64 C65 C66 RACC D63 D64 D65 D66 S29WS-J_00_A4 June 24, 2005 ...

Page 91

... Figure 36. Latency with Boundary Crossing into Program/Erase Bank June 24, 2005 S29WS-J_00_A4 C62 C63 C63 C63 RACC latency t RACC latency D61 D62 D63 S29WS128J/064J C63 C64 C65 C66 RACC t RACC Invalid Read Status D63 91 ...

Page 92

... AVD# falling edge number of clock cycles programmed Figure 37. Example of Wait States Insertion S29WS128J/064J D0 D1 Rising edge of next clock cycle following last wait state triggers next burst data S29WS-J_00_A4 June 24, 2005 ...

Page 93

... Read status (at least two cycles) in same bank and/or array data from other bank OEH t OEZ t ACC t t OEH SR Figure 38. Back-to-Back Read/Write Cycle Timings S29WS128J/064J Begin another write or program command sequence GHWL RD AAh 555h 93 ...

Page 94

... Erase and Programming Performance Parameter Typ (Note 1) Max (Note 2) ° S29WS128J/064J Unit Comments S29WS-J_00_A4 June 24, 2005 ...

Page 95

... RESPECTIVELY 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW e/2 8. NOT USED. 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. S29WS128J/064J ...

Page 96

... RESPECTIVELY 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW e/2 8. NOT USED. 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. S29WS128J/064J ...

Page 97

... Revision Summary Revision A0 (July 22, 2004) Revision A1 (October 6, 2004) Revision A2 (December 10, 2004) Revision A3 (February 19, 2005) Revision A4 (June 24, 2005) June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 97 ...

Page 98

... Copyright ©2004-2005 Spansion LLC. All rights reserved. Spansion, the Spansion logo, and MirrorBit are trademarks of Spansion LLC. Other company and product names used in this publication are for identification purposes only and may be trademarks of their respective companies S29WS128J/064J S29WS-J_00_A4 June 24, 2005 ...

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