SC1405B Semtech Corporation, SC1405B Datasheet - Page 9

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SC1405B

Manufacturer Part Number
SC1405B
Description
High Speed Synchronous Power MOSFET Smart Driver
Manufacturer
Semtech Corporation
Datasheet

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To eliminate the effect of the ringing on the boost ca-
pacitor voltage, place a 4.7 - 10 Ohm resistor between
boost Schottky diode and Vcc to filter the negative spikes
on DRN Pin. Alternately, a Silicon diode, such as the
commonly available 1N4148 can substitute for the
Schottky diode and eliminate the need for the series re-
sistor.
Proper layout will guarantee minimum ringing and elimi-
nate the need for external components. Use of SO-8 or
other surface mount MOSFETs will reduce lead induc-
tance and their parasitic effects.
ASYNCHRONOUS OPERATION
The SC1405B can be configured to operate in Asynchro-
nous mode by pulling S-MOD to logic LOW, thus disabling
the bottom FET drive. This has the effect of saving power
at light loads since the bottom FET’s gate capacitance
does not have to charged at the switching frequency.
There can be a significant savings since the bottom driver
can supply up to 2A pulses to the FET at the switching
frequency.
operating in asynchronous mode. When operating in syn-
chronous mode, the inductor current can go negative
and flow in reverse direction when the bottom FET is on
and the DC load is less than 1/2 inductor ripple current.
POWER MANAGEMENT
Applications Information (Cont.)
2004 Semtech Corp.
There is an additional efficiency benefit to
9
At that point, the inductor core and wire losses, depend-
ing on the magnitude of the ripple current, can be quite
significant. Operating in asynchronous mode at light loads
effectively only charges the inductor by as much as
needed to supply the load current, since the inductor
never completely discharges at light loads. DC regula-
tion can be an issue when operating in asynchronous
mode, depending on the type of controller used and mini-
mum load required to maintain regulation. If there are
no Shottkey diodes used in parallel with bottom FET, the
FET’s body diode will need to conduct in asynchronous
mode. The high voltage drop of this diode must be con-
sidered when determining the criteria for this mode of
operation.
DSPS DR
This pin produces an output which is a logical duplicate
of the bottom FET’s gate drive, if S-MOD is held LOW.
OVP_S/OVER TEMP SHUTDOWN
Output over-voltage protection may be implemented on
the SC1405 independent of the PWM controller . A volt-
age divider from the output is compared with the inter-
nal bandgap voltage of 1.2V (typical). Upon exceeding
this voltage, the overvoltage comparator disables the top
FET, while turning on the bottom FET to allow discharge
of the output capacitors excessive voltage through the
output inductor. There should be sufficient RC time con-
stant as well as voltage headroom on the OVP_S pin to
assure it does not enter overvoltage mode inadvertently.
The SC1405 will shutdown if its Tj exceeds 165°C.
SC1405B
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