MX25L6402 Macronix International, MX25L6402 Datasheet
MX25L6402
Related parts for MX25L6402
MX25L6402 Summary of contents
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... Low active erase current: 35mA (typical) - Low standby current: 5uA (typical, CMOS) • Minimum 100 erase/program cycle P/N: PM0943 MX25L6402 Macronix NBit 64M-BIT [x 1] CMOS SERIAL eLite Flash SOFTWARE FEATURES • Input Data Format - 1-byte Command code, 3-byte address, 1-byte byte address • ...
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... GENERAL DESCRIPTION The MX25L6402 is a CMOS 67,108,864 bit serial MTP EEPROM, which is configured as 8,388,608 x 8 internally. The MX25L6402 features a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS input ...
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... BLOCK DIAGRAM www.DataSheet4U.com SI CS,ACC, RESET SCLK P/N: PM0943 Address Generator Memory Array Data Register Y-Decoder SRAM Buffer Mode State HV Logic Machine Generator Clock Generator 3 MX25L6402 Output Sense Amplifier Buffer SO REV. 1.0, SEP. 29, 2004 ...
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... CS goes CS goes high high Bit5 Bit4 X A22 A21 A15 A14 A13 MX25L6402 Chip Page Erase Erase Program F1H F4H F2H AD1 X AD1 AD2 X AD2 AD3 BA Start to Load erase at n bytes CS CS rising data to ...
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... This command is sent with an extra dummy byte( 2-byte command). The device will clock out manufacturer code (C2H) and device code (9CH) when this command is issued. The clock to clock out the data is supplied by the master SPI. P/N: PM0943 bit5 bit4 bit3 NA erase program error error 1=error 1=error 5 MX25L6402 bit2 bit1 bit0 NA NA ready/busy 1=ready 0=busy REV. 1.0, SEP. 29, 2004 ...
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... The status register is reset with following status : Bit 7 = "1" -----> Refer to page 5 for detail. Bit 6,5,2,1 = Reserve for future use. Bit 4 = "0" -----> Erase error flag is reset. Bit 3 = "0" -----> Program error flag is reset. Bit 0="1" -----> Device is in ready state. P/N: PM0943 MX25L6402 6 REV. 1.0, SEP. 29, 2004 ...
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... BA: Byte address Bit sequence: AD1:First Address Bit sequence: AD2:Second Address Bit sequence: AD3:Thrid Address Bit sequence: P/N: PM0943 A22 A21 A20 A19 A16 A15 A14 A13 A12 A11 MX25L6402 A1 A0 A18 A17 A10 REV. 1.0, SEP. 29, 2004 ...
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... Set Read Status Register Command. NO YES NO YES Program Error To Continue Other Operation, Do Clear Status Register Command First MX25L6402 Auto Chip Erase Flow Chart START F4H Set Chip Erase Dummy Dummy 83H Set Read Status Register Command. Dummy Read Status Register Bit 7= 0? ...
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... YES Another Sector ? Operation Done, Device stays at Read Status Register Mode until CS goes high. P/N: PM0943 Set Sector Eraes Command. Set Read Status Register Command. NO YES NO YES Erase Error To Continue Other Operation, Do Clear Status Register Command First MX25L6402 REV. 1.0, SEP. 29, 2004 ...
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... VCC+0.5V while VCC+0.5V is smaller than or equal to 4.6V. Maximum Positive Overshoot Waveform 20ns 4.6V 3.6V MIN. 10 MX25L6402 20ns TYP MAX. UNIT CONDITIONS 10 pF VIN = VOUT = 0V REV ...
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... INPUT TEST WAVEFORMS AND MEASURESMENT LEVEL www.DataSheet4U.com OUTPUT LOADING P/N: PM0943 3.0V 1.5V 0V Note:Input pulse rise and fall time are < 10ns DEVICE UNDER TEST CL CL=50pF Including jig capacitance 11 MX25L6402 AC Measurement Level +3.3V DIODES=IN3064 OR EQUIVALENT REV. 1.0, SEP. 29, 2004 ...
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... VCC+0.5 0.4 0.8VCC 12 MX25L6402 UNITS TEST CONDITIONS uA VCC = VCC Max VIN = VCC or GND uA VCC = VCC Max VIN = VCC or GND uA VCC = VCC Max CS = VCC 0.2V mA VCC = VCC Max CS = VIH mA mA Program in Progress mA Erase in Progress uA RESET=GND + 0.3V V VCC=3 ...
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... NOTES: 1. Typical value is calculated by simulation. SERIAL DATA INPUT/OUTPUT TIMING tCS A CS# SCLK SI SO P/N: PM0943 (Temperature = VCC = 3.0V ~ 3.6V) tCY C tSKL tSKH BIT 7 BIT 0 tDH tDS BIT 7 tAA 13 MX25L6402 Min. Typ. Max. Units Condition 25 MHz f=25MHz 5 ns f=25MHz ...
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... RESET TIMING WAVEFORM VDD VIH RESET VIL VIH CS VIL P/N: PM0943 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Hi-Z 1st byte 3V tRP (500ns) tRST tCSR tCSF tCSHR Reset state (500ns) 14 MX25L6402 Bit 0 VCC(3.3V) tRFT tRP: RESET=Vil hold time from VCC min. REV. 1.0, SEP. 29, 2004 ...
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... Bit 1 Bit 0 Bit 7 Bit6 Bit 5 Bit 4 Bit 3 1st data output byte Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit6 (N-1)th data output byte 15 MX25L6402 Bit 7 Bit 6 Bit5 Bit 4 2nd byte (AD1) Bit 2 Bit 1 Bit 0 Bit 7 Bit6 Bit 5 2nd data output byte Bit 5 Bit 4 Bit 3 ...
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... Bit2 Bit2 Bit1 Bit1 Bit1 Bit0 Bit0 Bit0 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 (N-1)th status output byte (N-1)th status output byte 16 MX25L6402 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit5 Bit5 Bit5 Bit4 Bit4 Bit4 2nd byte (Dumm y) 2nd byte (Dumm y) Bit2 Bit2 ...
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... CLEAR STATUS REGISTER TIMING WAVEFORM CS SCLK SO www.DataSheet4U.com NOTES: 1. 1st Byte='89h' ==> CLEAR STATUS REGISTER Hi-Z state P/N: PM0943 SI Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Hi-Z 1st byte (89h) 17 MX25L6402 Bit2 Bit 1 Bit 0 REV. 1.0, SEP. 29, 2004 ...
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... Bit3 Bit3 Bit2 Bit2 Bit2 Bit1 Bit1 Bit1 Bit0 Bit0 Bit0 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 (N-1) ID byte (N-1) ID byte 18 MX25L6402 Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 Bit0 Bit0 Bit0 Bit0 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 1st ID byte (C2h) ...
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... Bit0 Bit 7 Bit 6 Bit 5 Bit 4 5th byte (BA) 1st write data byte Bit 3 Bit 2 Bit 1 Bit 0 Bit7 Bit 6 (N-1)th write data byte 19 MX25L6402 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 2nd byte (AD1) Bit 3 Bit 2 Bit 1 Bit0 Bit 7 Bit 6 2nd write data byte Bit 5 Bit 4 ...
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... Bit 7 Bit 6 Bit 5 Bit 0 Bit 7 Bit 6 Hi-Z 1st byte 2nd byte - F1h for Sector Erase - AD1 for sector - F4h for Chip Erase - Dummy for chip 20 MX25L6402 VHH Bit 5 Bit 0 Bit7 Bit 6 Bit 0 3rd byte - AD2 for sector - Dummy for chip REV ...
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... ACCESS OPERATING STANDBY TIME CURRENT CURRENT 25MHz 24mA 25MHz 24mA 21 MX25L6402 UNIT Comments s Note (4) s Note (4) s Note (4) s Note (4) mS Excludes system level overhead( Excludes system level overhead(3) s PACKAGE Remark 50uA 32 pin SOP (450 mil) ...
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... PACKAGE IMFORMATION www.DataSheet4U.com P/N: PM0943 MX25L6402 22 REV. 1.0, SEP. 29, 2004 ...
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... REVISION HISTORY Revision No. Description 1.0 1. Removed title "Preliminary" on page 1 www.DataSheet4U.com P/N: PM0943 MX25L6402 Page P1 23 Date SEP/29/2004 REV. 1.0, SEP. 29, 2004 ...
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... MX25L6402 MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...