MX25L6402A Macronix International, MX25L6402A Datasheet
MX25L6402A
Related parts for MX25L6402A
MX25L6402A Summary of contents
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... Minimum 100 erase/program cycle SOFTWARE FEATURES • Input Data Format - 1-byte Command code, 3-byte address, 1-byte byte address P/N: PM1040 MX25L6402A Macronix NBit 64M-BIT [x 1] CMOS SERIAL eLite Flash • Auto Erase and Auto Program Algorithm - Automatically erases and verifies data at selected sector ...
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... GENERAL DESCRIPTION The MX25L6402A is a CMOS 67,108,864 bit serial eLite Flash TM Memory, which is configured as 8,388,608 x 8 internally. The MX25L6402A features a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO) ...
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... BLOCK DIAGRAM www.DataSheet4U.com SI CS#, ACC, RESET# SCLK P/N: PM1040 Address Generator Memory Array Data Register Y-Decoder SRAM Buffer Mode State HV Logic Machine Generator Clock Generator 3 MX25L6402A Output Sense Buffer Amplifier SO REV. 1.0, SEP. 29, 2004 ...
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... CS goes CS goes high high Bit5 Bit4 X A22 A21 A15 A14 A13 MX25L6402A Chip Page Erase Erase Program F1H F4H F2H AD1 X AD1 AD2 X AD2 AD3 BA Start to Load erase at n bytes CS CS rising data to ...
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... Read ID This command is sent with an extra dummy byte( 2-byte command). The device will clock out manufacturer code (C2H) and device code (9CH) when this command is issued. The clock to clock out the data is supplied by the master SPI. P/N: PM1040 MX25L6402A bit5 bit4 bit3 ...
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... Bit 7 = "1" -----> Refer to page 5 for detail. Bit 6 = "0" -----> Device is not in parallel mode. Bit 5,2,1 = Reserve for future use. Bit 4 = "0" -----> Erase error flag is reset. Bit 3 = "0" -----> Program error flag is reset. Bit 0="1" -----> Device is in ready state. P/N: PM1040 MX25L6402A 6 TM REV. 1.0, SEP. 29, 2004 ...
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... SI pin, synchronized with the rising edge of SCLK. The bit sequence for both input and output data is bit 7 (MSB) first, then bit 6, bit 5, ...., and bit 0.(LSB) ADDRESS SEQUENCE The address assignment is described as follows : BA: Byte address Bit sequence: AD1:First Address Bit sequence: AD2:Second Address Bit sequence: AD3:Thrid Address Bit sequence: P/N: PM1040 MX25L6402A ...
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... Set Read Status Register Command. NO YES NO YES Program Error To Continue Other Operation, Do Clear Status Register Command First MX25L6402A Auto Chip Erase Flow Chart START F4H Set Chip Erase Dummy Dummy 83H Set Read Status Register Command. Dummy Read Status Register Bit 7= 0? ...
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... Parallel Mode for Read/Program Flow Chart Set Sector Eraes Command. Set Read Status Register Command. NO YES NO YES Erase Error To Continue Other Operation, Do Clear Status Register Command First MX25L6402A START 55H Auto Page Program, Read, Read ID or Read Status Power-off to exit REV. 1.0, SEP. 29, 2004 ...
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... Maximum Positive Overshoot Waveform 20ns 4.6V 3.6V MIN. 10 MX25L6402A NOTICE: 1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and functional operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability ...
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... INPUT TEST WAVEFORMS AND MEASURESMENT LEVEL www.DataSheet4U.com OUTPUT LOADING P/N: PM1040 3.0V 1.5V 0V Note:Input pulse rise and fall time are < 10ns DEVICE UNDER TEST CL 6.2K ohm CL=50pF Including jig capacitance 11 MX25L6402A AC Measurement Level 2.7K ohm +3.3V DIODES=IN3064 OR EQUIVALENT REV. 1.0, SEP. 29, 2004 ...
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... VCC+0.5 0.4 0.8VCC 12 MX25L6402A UNITS TEST CONDITIONS 2 uA VCC = VCC Max VIN = VCC or GND uA VCC = VCC Max VIN = VCC or GND uA VCC = VCC Max CS# = VCC 0.2V mA VCC = VCC Max CS# = VIH mA f=25MHz (serial) f=1.25MHz (parallel) mA Program in Progress ...
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... Serial Parallel Serial 40 Parallel 800 Serial 20 Parallel 400 Serial 20 Parallel 150 Serial Parallel Serial Parallel 500 500 5 20 Serial Parallel MX25L6402A Typ. Max. Units Condition 25 MHz 1.25 MHz f=25MHz 100 ns f=1.25MHz 5 ns f=25MHz 100 ns f=1.25MHz ...
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... SERIAL DATA INPUT/OUTPUT TIMING tCSA CS# SCLK www.DataSheet4U.com SI SO P/N: PM1040 tCYC tSKH tSKL BIT 7 BIT 0 tDH tDS BIT 7 tAA 14 MX25L6402A tCSB tCSH BIT 0 tDOH tDOZ REV. 1.0, SEP. 29, 2004 ...
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... CS#=VIL and commands are issuing, or commands are invalid, current=24mA(typ.) to 29mA(max.). RESET# TIMING WAVEFORM VDD VIH RESET# VIL VIH CS# VIL P/N: PM1040 3V tRP (500ns) tRST tCSR tCSF tCSHR Reset state (500ns) 15 MX25L6402A VCC(3.3V) tRFT tRP: RESET#=Vil hold time from VCC min. REV. 1.0, SEP. 29, 2004 ...
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... Byte=Address 1(AD1), A17=BIT 0, A18=BIT1, A19=BIT2, A20=BIT3, A21=BIT4, A22=BIT5. 3. 3rd Byte=Address 2(AD2), A9=BIT0, A10=BIT1,......A16=BIT7 4. 4th Byte=Address 3(AD3), A7=BIT0, A8=BIT1 5. 5th Byte=Byte Address(BA), A0=BIT0, A1=BIT1,......A6=BIT6 6. 6th-9th Bytes for SI ==> Dummy Bytes (Don't care) 7. From Byte 10, SO Would Output Array Data P/N: PM1040 MX25L6402A 16 REV. 1.0, SEP. 29, 2004 ...
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... Under parallel mode, the fastest access clock freq. will be changed to 1.25MHz(SCLK pin clock freq.). 9. To read array in parallel mode requires a parallel mode command (55H) before the read command. Once in the parallel mode, eLite Flash P/N: PM1040 MX25L6402A TM Memory will not exit parallel mode until power-off. 17 ...
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... READ STATUS REGISTER TIMING WAVEFORM (Serial) www.DataSheet4U.com NOTES: 1. BIT 7=0 ==> Program/Erase completed 2. BIT 4=1 ==>Erase Error 3. BIT 3=1 ==>Program Error 4. BIT 1,2,5==> Reserve for future use 5. BIT 0=1 ==> Device is in ready state 6. BIT 6=0 ==> Device is not in parallel mode P/N: PM1040 MX25L6402A 18 REV. 1.0, SEP. 29, 2004 ...
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... Under parallel mode, the fastest access clock freq. will be changed to 1.25MHz(SCLK pin clock freq.). 7. To read status register in parallel mode, which requires a parallel mode command (55H) before the read status register command. Once in the parallel mode, eLite Flash P/N: PM1040 MX25L6402A TM Memory will not exit parallel mode until power-off. 19 REV. 1.0, SEP. 29, 2004 ...
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... CLEAR STATUS REGISTER TIMING WAVEFORM www.DataSheet4U.com NOTES: 1. 1st Byte='89h' ==> CLEAR STATUS REGISTER Hi-Z state P/N: PM1040 MX25L6402A 20 REV. 1.0, SEP. 29, 2004 ...
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... READ ID TIMING WAVEFORM (Serial) www.DataSheet4U.com NOTES: 1. 1st Byte:85h. 2. 2nd Byte:Dummy Byte. 3. 3rd Byte:Output Manufacture Code(C2h). 4. 4th Byte:Output Device Code(9CH). 5. The 2 bytes ID output will be wrap around. P/N: PM1040 MX25L6402A 21 REV. 1.0, SEP. 29, 2004 ...
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... Under parallel mode, the fastest access clock freq. will be changed to 1.25MHz(SCLK pin clock freq.). 7. To read ID in parallel mode, which requires a parallel mode command (55H) before the read ID command. Once in the parallel mode, eLite Flash P/N: PM1040 TM Memory will not exit parallel mode until power-off. 22 MX25L6402A REV. 1.0, SEP. 29, 2004 ...
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... Byte:Address AD3 5. 5th Byte:Address BA. 6. 6th byte:1st write data byte. 7. When the last byte of the page will be written, the Byte Address will be wrap around to the first byte of the Page. 8. The 128-byte page address (A6~A0) must start from 0. P/N: PM1040 MX25L6402A 23 REV. 1.0, SEP. 29, 2004 ...
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... Under parallel mode, the fastest access clock freq. will be changed to 1.25MHz(SCLK pin clock freq.). 10. To program in parallel mode, which requires a parallel mode command (55H) before the page program command. Once in the parallel mode, eLite Flash P/N: PM1040 TM Memory will not exit parallel mode until power-off. 24 MX25L6402A REV. 1.0, SEP. 29, 2004 ...
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... AUTO SECTOR/CHIP ERASE TIMING WAVEFORM NOTES: 1. 1st byte:F1h for Sector Erase. 2. 2nd byte:Address AD1 for Sector Erase, Dummy byte for chip erase. 3. 3rd byte:Address AD2 for Sector Erase, Dummy byte for chip erase. P/N: PM1040 t VHH 25 MX25L6402A VHH REV. 1.0, SEP. 29, 2004 ...
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... Input Voltage with respect to GND on ACC Input Voltage with respect to GND on all power pins, SI, CS# Input Voltage with respect to GND on SO Current Includes all pins except VCC. Test conditions: VCC = 3.0V, one pin at a time. P/N: PM1040 MX25L6402A TYP. (1) Max. (2) UNIT Comments 160 ...
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... Current Current 25MHz 24mA 50uA 25MHz 24mA 50uA 25MHz 24mA 50uA 25MHz 24mA 50uA 27 MX25L6402A Temperature Package Remark Range pin SOP (330 mil pin SOP Pb-free (330 mil) - pin SOP (330 mil) ...
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... PACKAGE IMFORMATION www.DataSheet4U.com P/N: PM1040 MX25L6402A 28 REV. 1.0, SEP. 29, 2004 ...
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... REVISION HISTORY Revision No. Description 1.0 1. Removed title "Preliminary" on page 1 www.DataSheet4U.com P/N: PM1040 MX25L6402A Page P1 29 Date SEP/29/2004 REV. 1.0, SEP. 29, 2004 ...
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... MX25L6402A MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...