TM121XG_02L10D TORiSAN, TM121XG_02L10D Datasheet - Page 8

• Manufacturer Part Number: TM121XG_02L10D
• Description: LCD_Module
• Manufacturer: TORiSAN

Tottori SANYO Electric Co., Ltd.
Rin1 +/-
RCLK +/-
Rin0 +/-
Rin2 +/-
[Note 1] "DE mode" only.
[Note 2] INTERFA CE SIGNALS are loaded from LV DS-transmitter to TFT Timing generator
INTERFACE (LVDS) DATA ASSIGNMENT
INTERNAL SIGNALS
DCLK
HSYNC
VSYNC
DE
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
SYMBOL
The valid synchronous signals are DCLK and DE. HSYNC and VSYNC are invalid.
with LVDS sequence. (See BLOCK DIAGRAM.)
Data Clock
Horizontal Sync - This signal initiates a new line (negative).
Vertical Sync - This signal initiates a new frame (negative).
Data Enable
Red Data
Red Data
Red Data
Red Data
Red Data
Red Data
Green Data
Green Data
Green Data
Green Data
Green Data
Green Data
Blue Data
Blue Data
Blue Data
Blue Data
Blue Data
Blue Data
GO(LSB)
Rxout 6
Rxout13
Rxout20
DE
B1
R5(MSB)
Rxout12
B0(LSB)
Rxout19
Rxout 5
VSYNC
(LSB)
(MSB)
(LSB)
(MSB)
(LSB)
(MSB)
(positive)
G5(MSB)
Rxout18
Rxout 4
Rxout11
HSYNC
R4
TM121XG-02L10D
FUNCTION
B5(MSB)
Rxout10
Rxout17
Rxout 3
R3
G4
Rxout16
Rxout 2
Rxout 9
R2
G3
B4
Rxout15
Rxout 1
Rxout 8
Ver.2
R1
G2
B3
R0(LSB)
Rxout14
Rxout 0
Rxout 7
Page
G1
B2
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