upd4701a Renesas Electronics Corporation., upd4701a Datasheet - Page 4

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upd4701a

Manufacturer Part Number
upd4701a
Description
Mos Integrated Circuit
Manufacturer
Renesas Electronics Corporation.
Datasheet

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DESCRIPTION OF OPERATIONS
1. COUNT OPERATION
counter. An up-count is performed when the A-phase signals (X
performed when the B-phase signals (X
multiplication count method: see Fig. 1.)
initialized by reset input (RESET X, RESET Y) only.
2. OPERATION OF COUNT FLAG, CF
is “H”, and is an active-low output. CF is reset (
disabled and the “H” level is output.
4
Count Operation
The PD4701A executes an up-count and down-count by means of A & B 2-phase signals in the 12-bit up-down
This count operation is executed independently for the X axis (X
In an up-count, the next value after FFFH is 000H, and in a down-count, the next value after 000H is FFFH.
The count flag, CF, indicates that a count source (either X
X
Y
CF
CS
(X, Y)
(X, Y)
A, B
A, B
A
B
Input
Input
Count Flag Output Disabled in these Periods
1
Forward (Up-Count)
2
Fig. 2 Count Flag Output Timing Chart
Fig. 1 Count Operation Timing Chart
B
, Y
3
B
) are phase-advanced. The edge of each signal is a count source. (4-
4
“H”) by CS signal “L” input. While CS = “L”, count flag output is
5
A, B
or Y
A
, Y
A, B
A
A
, X
) are phase-advanced, and a down-count is
edge input) has occurred while the CS signal
B
4
) and Y axis (Y
3
Reverse (Down-Count)
2
A
, Y
B
). This operation is
1
0
PD4701A

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