HEF4013BTT,118 NXP Semiconductors, HEF4013BTT,118 Datasheet
HEF4013BTT,118
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HEF4013BTT-T
HEF4013BTT-T
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HEF4013BTT,118 Summary of contents
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HEF4013B Dual D-type flip-flop Rev. 06 — 27 October 2009 1. General description The HEF4013B is a dual D-type flip-flop that features independent set-direct input (SD), clear-direct input (CD), clock input (CP) and outputs (Q, Q). Data is accepted when ...
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... NXP Semiconductors 5. Functional diagram Fig 1. Functional diagram Fig 2. Logic diagram (one flip-flop) HEF4013B_6 Product data sheet 6 1SD FF1 3 2 1CP 1CD 8 2SD FF2 11 12 2CP 2CD 001aag084 Rev. 06 — 27 October 2009 HEF4013B Dual D-type flip-fl 001aag086 © NXP B.V. 2009. All rights reserved. ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin 1Q 1Q 1CP, 2CP 3, 11 1CD, 2CD 1SD, 2SD Functional description [1] Table 3. Function table Control nSD nCD [ HIGH voltage level LOW voltage level don’t care; ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V Symbol Parameter V supply voltage DD I input clamping current IK V input voltage I I output clamping current OK I input/output current I/O I supply current ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics unless otherwise specified Symbol Parameter Conditions V HIGH-level I < input voltage V LOW-level I < input voltage V HIGH-level I < output voltage V LOW-level I < output voltage I HIGH-level output current LOW-level output current V = 0.5 V ...
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... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics unless otherwise specified. For test circuit see amb Symbol Parameter Conditions t HIGH to LOW nCP to nQ, nQ; PHL propagation delay see nSD to nQ nCD LOW to HIGH nCP to nQ, nQ; PLH propagation delay see nSD to nQ nCD to nQ ...
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... NXP Semiconductors Table 7. Dynamic characteristics unless otherwise specified. For test circuit see amb Symbol Parameter Conditions t recovery time nSD input; rec see nCD input; see f maximum clock see clk(max) frequency [1] Typical values of the propagation delays and output transition times can be calculated with the extrapolation formulas. C Table 8 ...
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... NXP Semiconductors V input nCP input nSD input nCD output Recovery times are shown as positive values but may be specified as negative values. Measurement points are given in Fig 5. nSD, nCD recovery time and pulse width Table 9. Measurement points Supply voltage Input 0.5V DD Test and measurement data is given in Defi ...
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... NXP Semiconductors 13. Application information clock Fig 7. N-stage shift register clock Fig 8. Binary ripple up-counter; divide-by-2 clock Fig 9. Modified ring counter; divide-by-( HEF4013B_6 Product data sheet T-type flip-flop Rev. 06 — 27 October 2009 HEF4013B Dual D-type flip-fl 001aag089 001aag090 001aag091 © NXP B.V. 2009. All rights reserved. ...
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... NXP Semiconductors 14. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 15. Revision history Table 11. Revision history Document ID Release date HEF4013B_6 20091027 • Modifications: Table 5 “Recommended operating conditions” HEF4013B_5 20090619 HEF4013B_4 20080515 HEF4013B_CNV_3 19950101 HEF4013B_CNV_2 19950101 HEF4013B_6 Product data sheet Data sheet status Change notice Product data sheet - Product data sheet ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Application information Package outline ...