74f541sjx-nl Fairchild Semiconductor, 74f541sjx-nl Datasheet
74f541sjx-nl
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74f541sjx-nl Summary of contents
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... Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC 74F540 IEEE/IEC 74F541 © 2000 Fairchild Semiconductor Corporation Features 3-STATE outputs drive bus lines Inputs and outputs opposite side of package, allowing easier interface to microprocessors Package Description ...
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Unit Loading/Fan Out Pin Names 3-STATE Output Enable Input (Active LOW Inputs Outputs n n Truth Table Inputs ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...
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AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH t Data to Output (74F540) PHL t Output Enable Time (74F540) PZH t PZL t Output Disable Time (74F540) PHZ t PLZ t Propagation Delay PLH t Data to Output (74F541) ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...