atsam3303b ATMEL Corporation, atsam3303b Datasheet

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atsam3303b

Manufacturer Part Number
atsam3303b
Description
Atsam3303b Audio Processing
Manufacturer
ATMEL Corporation
Datasheet
Features
1. Description
The ATSAM3303B is a member of the new ATSAM3000 family that uses the DSP
array technology. The ATSAM3303B includes three 24-bit DSPs, a 24-bit Audio
Router and a general-purpose 16-bit on-chip CISC microcontroller. Its high perfor-
mance and flexibility allow implementation of professional-quality audio applications,
such as MP3 decoding, Wavetable synthesis, effect processing and mixing. A variety
of I/Os, including external Wave ROM, SmartMedia
Sampling rates up to 96 kHz at 24 bits are supported.
Three DSPs and 24-bit Audio Router On-chip
32 kHz to 96 kHz Sampling Rate
16-bit Microcontroller On-chip
Variety of I/Os, including SmartMedia
Embedded RAM for Single Chip Operation (530 Kbits)
Warm Start Power-down
1 µA Typical Deep Power-down, 0.5 mW/MIPS Typical Operating
External Flash/ROM Capability
Available in a 100-lead LQFP Package
Ideal for Real-time Audio Applications
Typical Applications: MP3 Player, Musical Instruments, Consumer Electronic, Effect
Devices
– Wavetable Synthesis (GM-Lite)
– MP3 Decoding
– Effect Processing (Reverb, Echo, Chorus, etc.)
®
and DataFlash
®
®
and DataFlash
®
are provided.
Audio
Processing
ATSAM3303B
GM-Lite
Synthesizer/
Professional
Effects DSP
6091D—DRMSD—12-Feb-07

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atsam3303b Summary of contents

Page 1

... Typical Applications: MP3 Player, Musical Instruments, Consumer Electronic, Effect Devices 1. Description The ATSAM3303B is a member of the new ATSAM3000 family that uses the DSP array technology. The ATSAM3303B includes three 24-bit DSPs, a 24-bit Audio Router and a general-purpose 16-bit on-chip CISC microcontroller. Its high perfor- mance and flexibility allow implementation of professional-quality audio applications, such as MP3 decoding, Wavetable synthesis, effect processing and mixing ...

Page 2

... Functional Description 3.1 DSP Array The ATSAM3303B includes three on-chip DSPs. Each DSP (P24) is built around RAM and ROM. The RAM contains both data and P24 instructions; the ROM contains typical coefficients such as FFT cosines and win- dowing. A P24 sends and receives audio samples through the Sync Bus. It can request external data such as compressed audio through the Async Bus ...

Page 3

... MMU (Memory Management Unit) The MMU handles transfer requests between the external or embedded RAM/ROM, the P16 and the P24s through the Async Bus. The ATSAM3303B includes an on-chip 16K x 24 RAM. 3.6 Router: Final ACC, MIX, Audio Out, Audio In This block includes a RAM, accessed through the Async Bus, which defines the routing from the Sync Bus to/from the Audio I/O or back to the Sync Bus (mix send) ...

Page 4

... Built-in Standard Midi file player (SMF) dramatically reduces host load Figure 4-2. ATSAM3303B 4 Host-controlled MP3 or Cost-optimized GM-Lite Wavetable Player (Cellular Phone) Compressed Audio ATSAM3303B or MidiFile (from Host) ® high-quality wavetable sound Ultra Low-cost Musical Keyboard Switches, ATSAM3303B LCD Display MIDI ROM Stereo Audio DAC Out Keyboard ROM Stereo Audio DAC Out ...

Page 5

... Stereo 31-band equalizer @48 kHz The ATSAM3303B runs firmware directly from an external ROM/Flash memory. It may also run firmware from local RAM, thus freeing many I/O pins, which can then be used for application- dependent functions. The ATSAM3303B is the ideal choice when wavetable synthesis or many I/O pins are required ...

Page 6

... SCLK 98 CS 100 P0.11 100 SYNC 100 WR 1 SMC 1 P0.12 1 ATSAM3303B 6 Type Sharing Description PWR - Digital ground. All these pins should be returned to a ground plane Core power. All these pins should be returned to nominal 1. PWR - PWROUT if the built-in power switch is used. PWR - Periphery power. All these pins should be returned to nominal 3.3V. Power switch input ...

Page 7

... CLBD master rate or corresponding CLAD3 - 1 - when sampling rate conversion is requested. Pd DAAD3 - 1 have built-in pull-downs. They may be left open if not used. External DAC/Codec Mute. Sensed at power up. If found high, then I/O 10 MUTE becomes an active high output. If found low, then MUTE becomes an active low output. I/O 10 General-purpose I/O pin ATSAM3303B 7 ...

Page 8

... WCS0 4 P1.9 4 WOE 48 P1.8 48 WWE 49 P1.7 49 DFCS 23 DFSI 25 DFSO 32 ATSAM3303B 8 Type Sharing Description Out 11 External memory address bit, extension to 64 Mbits Out 11 SmartMedia chip enable (CE), active low I/O 11 General-purpose I/O pin Out 12 External memory address bit, extension to 32 Mbits Out 12 SmartMedia address latch enable (ALE) ...

Page 9

... In - when power switch is used). To exit from power down, PDWN has to be set high then RESET applied. Alternate programmable power-downs are available which allow warm restart of the chip Test input. Should be grounded or left open. Pd ATSAM3303B ) can be connected to X1 using AC coupling PP 9 ...

Page 10

... Pinout by Pin Number Table 6-2. ATSAM3303B Pinout by Pin Number Pin # Pin Name 1 WR SMC P0. R|B P0.13 3 WCS1 P1.10 4 WCS0 P1.9 5 CKOUT 6 CLBD 7 WSBD 8 IRQ INT SMRE FS0 P0.8 9 GND 10 WA0 P2.0 11 WA1 P2.1 12 WA2 P2.2 13 VC3 14 WA3 P2.3 15 WA4 P2.4 16 WA5 P2.5 17 MIDI_IN P0.14 SDIN 18 MIDI_OUT FS1 P0.9 19 MUTE P1.6 20 VC18 21 WA6 P2.6 22 GND 23 DFCS 24 DFSCK ...

Page 11

... Marking 8. Mechanical Dimensions Figure 8-1. Thin Plastic 100-lead Quad Flat Pack (LQFP100) 6091D–DRMSD–12-Feb- A05 Pin 1 ATSAM3303B 11 ...

Page 12

... Table 8-1. Denomination ATSAM3303B 12 Package Dimensions in mm Min 1.40 0.05 1.35 0.45 0.13 Nom Max 1.50 1.60 0.10 0.15 1.40 1.45 0.60 0.75 14.00 12.00 14.00 12.00 0.40 0.18 0.23 6091D–DRMSD–12-Feb-07 ...

Page 13

... Please contact Atmel in C18 outside the recommended operating range. C33 ATSAM3303B Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any ...

Page 14

... C18 I (crystal freq. = 11.2896 MHz, all P24s stopped, warm CC3 start power-down active) V deep power down supply current C18 I CC4 (using power switch) PU/PD Built-in pull-up/pull-down resistor ATSAM3303B 14 = 25° 1.8V ± 10 C18 C33 =- 3.3V ± 10%) Min Typ Max -0 ...

Page 15

... Timing Parameters Parameter Address valid to chip select low Chip select low to RD low RD high to CS high RD pulse width Data out valid from RD Data out hold from RD Chip select low to WR low WR high to CS high ATSAM3303B t t PRD RDHCSH t t RDLDV DRH t ...

Page 16

... RF Status register is read when • TE: Transmit empty If 0, data from ATSAM3303B to host is pending and IRQ is high. Reading the data will set and clear IRQ. • RF: Receiver full If 0, then ATSAM3303B is ready to accept DATA from host. Note: 10 ...

Page 17

... Pins used: CLBD (output), WSBD (output), DABD3 - 0 (outputs), DAAD3 - 0 (inputs) Optionally: CLAD3 - 0 (inputs), WSAD3 - 0 (inputs) The ATSAM3303B allows for 8 digital audio output channels and 8 digital audio input channels. All audio channels are normally synchronized on single clocks CLBD, WSBD which are derived from the IC crystal oscillator ...

Page 18

... The choice of sample frequency is done by the firmware. Figure 10-6. Digital Audio Frame Format, 128 x Fs and 256 x Fs Modes WSBD CLBD DABD3 - 0 DAAD3 - 0 MSB ATSAM3303B SOD Digital Audio Timing Parameters Parameter CLBD rising to WSBD change DABD valid prior/after CLBD rising ...

Page 19

... When using all address bits, the maximum address range is two pages (WCS0, WCS1 words (total = 16 Mbytes). Figure 10-8. ROM/Flash Read Cycle 6091D–DRMSD–12-Feb-07 LSB 16 bits WCS0 WCS1 WA0 - WA21 WOE WD0 - WD15 ATSAM3303B LSB MSB 24 bits CSOE t POE t ...

Page 20

... WC t Write enable low from CS or Address or WOE CSWE t Write pulse width WP t Data out setup time DW t Data out hold time DH ATSAM3303B 4 2 ns. LCK min. Typical value with crystal 12.288 MHz is 80 ns. ACE WCS0 WCS1 t CSWE WA0 - WA21 ...

Page 21

... 0). 2. The host sends the firmware size (in words) on two bytes (Low byte first). 3. The host sends the ATSAM3303B firmware. The firmware should begin with string “DR”. 4. The byte 0ACh is written to the host, this raises IRQ. The host recognizes that the chip has accepted the firmware ...

Page 22

... Crystal, LFT The paths between the crystal, the crystal compensation capacitors, the LFT filter R-C-R and the ATSAM3303B should be short and shielded. The ground return from the compensation capaci- tors and LFT filter should be the GND plane from ATSAM3303B. • Buses Parallel layout between and WA0 - WA21/WD0 - WD15 should be avoided ...

Page 23

... Recommended Crystal Compensation and LFT Filter Figure 13-1. Recommended Crystal Compensation and LFT Filter 6091D–DRMSD–12-Feb- 560 GND ATSAM3303B X1 X2 LFT 23 ...

Page 24

... A library of frequently used functions is available, such as: • Wavetable synthesis • Reverb/Chorus • MP3 decode • 31-band equalizer • Parametric equalizer Atmel engineers are available to study customer-specific applications. ATSAM3303B 24 ® (98, ME, 2000, XP). Within the environment possible to: 6091D–DRMSD–12-Feb-07 ...

Page 25

... Corrected description of RESET pin in 6091B Section 12. ”Recommended Board Layout” on page Changed all references TQFP to LQFP. Changed pin name for Pin No 6091C “ATSAM3303B Pinout by Pin Number,” on page 10 Changed all references ATSAM3308 to ATSAM3308B. Added page 11. Updated 6091D “External Flash Timing Parameters,” on page Memory Parameters,” ...

Page 26

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2007 Atmel Corporation. All rights reserved. Atmel are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Windows of Microsoft Corporation in the US and/or other countries. Other terms and product names may be trademarks of others. Atmel Operations ...

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