dg221

Manufacturer Part Numberdg221
DescriptionQuad Spst Cmos Analog Switch With Latches
ManufacturerETC-unknow
dg221 datasheet
 


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Quad SPST CMOS Analog Switch with Latches
Features
Accepts 150-ns Write Pulse Width
5-V On-Chip Regulator
Built on PLUS-40 Process
Latches Are Transparent with WR Low
Low On-Resistance: 60
Description
The DG221 is a monolithic quad single-pole, single-throw
analog switch designed for precision switching applications in
communication, instrumentation and process control systems.
Featuring independent onboard latches and a common WR
pin, each DG221 can be memory mapped, and addressed as
a single data byte for simultaneous switching.
Designed on the Siliconix PLUS-40 CMOS process, the
Functional Block Diagram and Pin Configuration
Dual-In-Line and SOIC
IN
1
1
D
2
1
S
3
1
V–
4
GND
5
S
6
4
D
7
4
IN
8
4
Top View
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70041.
Siliconix
S-52881—Rev. C, 28-Apr-97
Benefits
Compatible with Most P Buses
Allows Wide Power Supply Tolerance
Without Affecting TTL Compatibility
Reduced Power Consumption
Allows Flexibility of Design
DG221 combines low power and low on-resistance (60
typical) while handling continuous currents up to 20 mA.
An epitaxial layer prevents latchup.
The device features true bidirectional performance in the on
condition. These switches guarantee a rail-to-rail blocking
capability (44 V max), in the off condition.
Four Latchable SPST Switches per Package
IN
16
2
0
0
D
15
2
1
0
S
14
2
X
V+
13
WR
12
X
1
S
Logic “0”
11
3
Logic “1”
D
10
3
IN
Ordering Information
3
Temp Range
0 C to 70 C
16-Pin Plastic DIP
–40 C to 85 C
16-Pin Narrow SOIC
–55 C to 125 C
16-Pin CerDIP
DG221
Applications
P Based Systems
Automatic Test Equipment
Communication Systems
Data Acquisition Systems
Medical Instrumentation
Factory Automation
ON
OFF
Control data latched-in,
switches on or off as selected
by last IN
X
Maintains previous state
0.8 V
2.4 V
Package
Part Number
DG221CJ
DG221DY
DG221AK/883
1

dg221 Summary of contents

  • Page 1

    ... Featuring independent onboard latches and a common WR pin, each DG221 can be memory mapped, and addressed as a single data byte for simultaneous switching. Designed on the Siliconix PLUS-40 CMOS process, the ...

  • Page 2

    ... DG221 Absolute Maximum Ratings Voltages Referenced to V– GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a Digital Inputs , (V–) – (V mA, whichever occurs first Continuous Current (Any Terminal Continuous Current ...

  • Page 3

    ... pF Room 90 Full 0.8 All Channels On or Off 2 Room –0.4 DG221 A Suffix D Suffix –55 to 125 C – Min Max Min Max Unit –15 15 – 135 135 – ...

  • Page 4

    ... DG221 Test Circuits + GND WR V– – (includes fixture and stray capacitance DS(on) + GND V– – (includes fixture and stray capacitance ...

  • Page 5

    ... GND TALK bypass Figure 7. Channel-to-Channel Crosstalk V GND WR INH(min) (V) (V) 0 2.4/0.8 0 2.4/0.8 0 2.4/0.8 0 2.4/0.8 DG221 + V– – Isolation = 20 log Logic Input ...

  • Page 6

    ... Notes may be held at “0” for temporary operation similar to DG201A/DG201B. With WR at “0” + DG221 ...