isl88731 Intersil Corporation, isl88731 Datasheet - Page 20

• Manufacturer Part Number: isl88731
• Description: Smbus Level 2 Battery Charger
• Manufacturer: Intersil Corporation

information is added to the feedback to create a second zero
F
ISL88731 add a pole at F
divider resistors that set the DC output voltage. For a 3 cell
battery, R
following relate the compensation network’s poles, zeros
and gain to the components in Figure 23. Figure 25 shows
an asymptotic Bode plot of the DC/DC converter’s gain vs.
frequency. It is strongly recommended that F
approximately 30% of F
of F
ZERO2
FIGURE 24. FREQUENCY RESPONSE OF THE LC OUTPUT
FIGURE 25. ASYMPTOTIC BODE PLOT OF THE VOLTAGE
-20
-40
-60
LC
60
40
20
0
.
0.1
. The low pass filter R
3
= 500kΩ and R
FILTER
CONTROL LOOP GAIN
R
= 200m Ω
BATTERY
F
R
= 50m Ω
1
ZERO1
BATTERY
Compensator
Modulator
Loop
FREQUENCY (kHz)
LC
FILTER
FREQUENCY
and F
4
= 100kΩ. The equations
20
F2
10
ZERO2
, C
. R
F
ZERO2
F2
3
and R
F
between R
is approximately 70%
LC
100
4
F
NO BATTERY
ZERO1
are internal
F
ESR
FILTER
F
POLE1
S2
is
and
1000
ISL88731
Compensation Break Frequency Equations
F
F
F
F
F
F
Choose R
from Equation 29.
R
Next choose C
calculated from Equation 30.
C
PCB Layout Considerations
Power and Signal Layers Placement on the PCB
As a general rule, power layers should be close together,
either on the top or bottom of the board, with signal layers on
the opposite side of the board. As an example, layer
arrangement on a 4-layer board is shown below:
Separate the power voltage and current flowing path from
the control and logic level signal path. The controller IC will
stay on the signal layer, which is isolated by the signal
ground to the power signal traces.
Component Placement
The power MOSFET should be close to the IC so that the
gate drive signal, the LGATE, UGATE, PHASE, and BOOT,
traces can be short.
Place the components in such a way that the area under the
IC has less noise traces with high dv/dt and di/dt, such as
gate signals and phase node signals.
1. Top Layer: signal lines, or half board for signal lines and
2. Signal Ground
3. Power Layers: Power Ground
4. Bottom Layer: Power MOSFET, Inductors and other
ZERO1
ZERO2
LC
FILTER
POLE1
ESR
VCOMP
VCOMP
the other half board for power lines
Power traces
=
=
-------------------------------
(
2π L C
------------------------------------------- -
(
=
=
=
=
2π C
=
=
VCOMP
--------------------------------------------------- -
(
---------------------------------------------------------------------- -
(
⎛
⎜
⎝
------------------------------------------ -
(
2π R
1
(
2π C
---------------------------------------------- -
2π R
-------------------------------------------------------------------------- -
(
2π R
⋅
0.7 F
0.3 F
⋅
⋅
⋅
o
⋅
⋅
VCOMP
1
R
o
⋅
⋅
⋅
VCOMP
)
SENSE
VCOMP
R
SENSE
F2
1
equal or lower than the value calculated
LC
LC
ESR
1
⋅
)
)
C
⋅
⋅
1
F2
)
(
(
equal or higher than the value
2π C
1
2π R
⋅
⋅
⋅
C
)
C
R
o
⋅
⋅
o
1COMP
)
⎞
⎟
⎠
o
VCOMP
⋅
⎛
⎜
⎝
⋅
-------------------- -
R
R
4
SENSE
R
)
+
4
R
)
3
⎞
⎟
⎠
)
⋅
⎛
⎝
⋅
gm1
----------- -
⎛
⎝
----------- -
gm1
5
5
⎞
⎠
November 20, 2006
⎞
⎠
⋅
⎛
⎜
⎝
R
-------------------- -
3
(EQ. 23)
(EQ. 24)
(EQ. 25)
(EQ. 26)
(EQ. 27)
(EQ. 28)
R
(EQ. 29)
(EQ. 30)
+
FN9258.0
4
R
4
⎞
⎟
⎠