ad5331bru-reel7 Analog Devices, Inc., ad5331bru-reel7 Datasheet
ad5331bru-reel7
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ad5331bru-reel7 Summary of contents
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CLR BUF GAIN CLR LDAC *Protected by U.S. Patent Number 5,969,657; other patents pending. 2 5.5 V, 115 A, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs AD5330/AD5331/AD5340/AD5341 GENERAL DESCRIPTION The ...
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AD5330/AD5331/AD5340/AD5341–SPECIFICATIONS ( REF L 1 Parameter Min PERFORMANCE AD5330 Resolution Relative Accuracy Differential Nonlinearity AD5331 Resolution Relative Accuracy Differential Nonlinearity AD5340/AD5341 Resolution ...
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DD AC CHARACTERISTICS unless otherwise noted.) 2 Parameter Output Voltage Settling Time AD5330 AD5331 AD5340 AD5341 Slew Rate Major Code Transition Glitch Energy Digital Feedthrough Multiplying Bandwidth Total Harmonic Distortion NOTES 1 Guaranteed by design and characterization, not ...
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... JA θ Thermal Impedance (24-Lead TSSOP 42°C/W JC Model Temperature Range AD5330BRU –40°C to +105°C AD5331BRU –40°C to +105°C AD5340BRU –40°C to +105°C AD5341BRU –40°C to +105°C CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD5330/AD5331/AD5340/AD5341 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges ...
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AD5330 FUNCTIONAL BLOCK DIAGRAM POWER-ON RESET BUF INPUT DAC GAIN REGISTER REGISTER INTER- DB FACE 0 LOGIC CS WR RESET CLR LDAC Pin No. Mnemonic Function 1 BUF Buffer Control Pin. This pin controls whether the ...
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AD5330/AD5331/AD5340/AD5341 AD5331 FUNCTIONAL BLOCK DIAGRAM POWER-ON RESET BUF INPUT DAC REGISTER REGISTER INTER- DB FACE 0 LOGIC CS WR RESET CLR LDAC Pin No. Mnemonic Function 1 DB Parallel Data Input Most Significant ...
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AD5340 FUNCTIONAL BLOCK DIAGRAM POWER-ON RESET BUF DAC INPUT GAIN REGISTER REGISTER INTER- DB FACE 0 LOGIC CS WR RESET CLR LDAC Pin No. Mnemonic Function 1 DB Parallel Data Input Most Significant ...
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AD5330/AD5331/AD5340/AD5341 AD5341 FUNCTIONAL BLOCK DIAGRAM BUF POWER-ON RESET GAIN HIGH BYTE REGISTER DB 0 REGISTER INTER- HBEN FACE LOW BYTE LOGIC REGISTER CS WR RESET CLR LDAC Pin No. Mnemonic Function 1 HBEN High Byte Enable ...
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TERMINOLOGY RELATIVE ACCURACY For the DAC, Relative Accuracy or Integral Nonlinearity (INL measure of the maximum deviation, in LSBs, from a straight line passing through the actual endpoints of the DAC transfer function. Typical INL versus Code plot ...
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AD5330/AD5331/AD5340/AD5341 OFFSET ERROR DRIFT This is a measure of the change in Offset Error with changes in temperature expressed in (ppm of full-scale range)/°C. GAIN ERROR DRIFT This is a measure of the change in Gain Error with ...
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Typical Performance Characteristics– 1 0.5 0 –0.5 –1.0 50 100 150 200 250 0 CODE 0 0.2 0.1 0 –0.1 –0.2 –0.3 ...
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AD5330/AD5331/AD5340/AD5341 0 0 REF 0 GAIN ERROR –0.1 –0.2 –0.3 –0.4 OFFSET ERROR –0.5 –0 – Volts DD 300 ...
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100 110 120 130 140 150 160 170 180 190 200 I – 0 0.2 0 –0 ...
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AD5330/AD5331/AD5340/AD5341 Resistor String The resistor string section is shown in Figure 28 simply a string of resistors, each of value R. The digital code loaded to the DAC register determines at what node on the string the voltage ...
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The low data byte of the AD5341 consists of data bits data inputs while the high byte consists of data 0 7 bits data inputs ...
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AD5330/AD5331/AD5340/AD5341 SUGGESTED DATABUS FORMATS In most applications GAIN and BUF are hard-wired. However, if more flexibility is required, they can be included in a databus. This enables you to software program GAIN, giving the option of doubling the resolution in ...
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Bipolar Operation Using the AD5330/AD5331/AD5340/AD5341 The AD5330/AD5331/AD5340/AD5341 have been designed for single supply operation, but bipolar operation is achievable using the circuit shown in Figure 36. The circuit shown has been configured to achieve an output voltage range of –5 ...
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AD5330/AD5331/AD5340/AD5341 Programmable Current Source Figure 38 shows the AD5330/AD5331/AD5340/AD5341 used as the control element of a programmable current source. In this example, the full-scale current is set to 1 mA. The output volt- age from the DAC is applied across ...
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Part No. Resolution DNL V SINGLES ± 0.25 AD5330 8 1 ± 0.5 AD5331 10 1 ± 1.0 AD5340 12 1 ± 1.0 AD5341 12 1 DUALS ± 0.25 AD5332 8 2 ± 0.5 AD5333 10 2 ± 1.0 AD5342 ...
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AD5330/AD5331/AD5340/AD5341 PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PIN 1 0.006 (0.15) 0.002 (0.05) SEATING OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Lead Thin Shrink Small Outline Package TSSOP (RU-20) 0.260 (6.60) 0.252 (6.40 0.177 (4.50) 0.169 ...