ad53519 Analog Devices, Inc., ad53519 Datasheet

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ad53519

Manufacturer Part Number
ad53519
Description
Dual Ultrafast Voltage Comparator
Manufacturer
Analog Devices, Inc.
Datasheet
a
Preliminary Technical Data
FEATURES
Robust Input Protection
300 ps Propagation Delay Input to Output
75 ps Propagation Delay Variation
Differential ECL Compatible Outputs
Differential Latch Control
Power Supply Rejection Greater than 70 dB
200ps Minimum Pulse Width (Bandwidth > 2.5
GHz)
5 Gbps Toggle Rate
Typical Output Rise/Fall of 150 ps
APPLICATIONS
Automatic Test Equipment
High Speed Instrumentation
Scope & Logic Analyzers Front End
Window Comparators
High Speed Line Receivers
Threshold Detection
Peak Detection
High Speed Triggers
Patient Diagnostics
Disk Drive Read Channel Detection
Hand-Held Test Instruments
Zero Crossing Detectors
Line Receivers & Signal Restoration
Clock Driver
Upgrade for SPT9689 Designs
Upgrade for AD96687 Designs
GENERAL DESCRIPTION
The AD53519 is an ultrafast voltage comparator fabricated on
ADI’s proprietary XFCB process. The device features 300 ps
propagation delay with better than 75 ps overdrive dispersion.
Dispersion is a particularly important characteristic of high
speed comparators. It is a measure of the difference in
propagation delay under differing overdrive conditions.
A fast, high precision differential input stage permits consistent
propagation delay with a wide variety of signals in the common
REV. Pr J July 22, 2002
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its use,
nor for any infringements of patents or other rights of third parties that may
result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Analog Devices.
PRELIMINARY TECHNICAL DATA
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
mode range from –2.0 V to +3.0 V. Outputs are
complementary digital signals fully compatible with ECL 10 K
and 10 KH logic families. The outputs provide sufficient drive
current to directly drive transmission lines terminated in 50 :
to –2 V. A latch input is included which permits tracking,
track-hold, or sample-hold modes of operation.
The AD53519 is available in a 20-lead PLCC package.
NONINVERTING
INPUT
Figure 1
INVERTING
INPUT
FUNCTIONAL BLOCK DIAGRAM
LATCH ENABLE
INPUT
Voltage Comparator
+
-
Dual Ultrafast
/LATCH ENABLE
INPUT
© Analog Devices, Inc., 2002
AD53519
www.analog.com
/Q OUTPUT
Q OUTPUT

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ad53519 Summary of contents

Page 1

... Clock Driver Upgrade for SPT9689 Designs Upgrade for AD96687 Designs GENERAL DESCRIPTION The AD53519 is an ultrafast voltage comparator fabricated on ADI’s proprietary XFCB process. The device features 300 ps propagation delay with better than 75 ps overdrive dispersion. Dispersion is a particularly important characteristic of high speed comparators ...

Page 2

... PRELIMINARY TECHNICAL DATA AD53519 AD53519 ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL INPUT CHARACTERISTICS Input Offset Voltage V OS Input Offset Voltage Channel Matching Offset Voltage Tempco Input Bias Current I BC Input Bias Current Tempco Input Offset Current Input Voltage Range Input Capacitance C IN ...

Page 3

... PRELIMINARY TECHNICAL DATA AD53519 Propagation Delay – Input t PDR to Output – Rise Propagation Delay – Input t PDF to Output – Fall Propagation Delay – Tempco Rise Time t R Fall Time t F Equivalent Bandwidth BW Toggle Rate Prop Delay vs. Duty Cycle Prop Delay vs. Duty Cycle Slow Edge Prop Delay vs ...

Page 4

... This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING GUIDE TEMP MODEL RANGE Description o AD53519JP 0/+70 C REV July 22, 2002 Package PLCC- ...

Page 5

... B. QB will be at logic HIGH if the analog voltage at the NONINVERTING INPUT is greater than the analog voltage at the INVERTING INPUT (provided the comparator is in the “compare” mode). See LATCH ENABLE channel B for additional information AD53519 PIN CONFIGURATION CONNECT Figure ...

Page 6

... PRELIMINARY TECHNICAL DATA AD53519 TIMING INFORMATION The timing diagram is presented to illustrate the AD53519 compare and latch features. /LATCH ENABLE LATCH ENABLE DIFFERENTIAL INPUT VOLTAGE Q OUTPUT /Q OUTPUT Figure 3 Terms used in timing diagrams: t INPUT TO OUTPUT HIGH PDH DELAY t INPUT TO OUTPUT LOW PDL DELAY ...

Page 7

... The AD53519 comparators are very high speed devices. Consequently, high speed design techniques must be employed to achieve the best performance. The most critical aspect of any AD53519 design is the use of low impedance ground plane. A ground plane, as part of a multilayer board, is recommended for proper high speed performance. Using a ...

Page 8

... DIFFERENTIAL LATCH VOLTAGE - mV Figure 6 THERMAL CONSIDERATIONS The AD53519 PLCC package option has a theta JA (junction to ambient thermal resistance) of 89.4 ° still air. INPUT Upgrading the SPT9689 and AD96687 “1" The AD53519 dual comparator is pin-for-pin compatible with the SPT9689 and AD96687 and offers many improvements over these devices ...

Page 9

... HIGH SPEED SAMPLING CIRCUIT + REF - ALL RESISTORS 50 OHM LATCH UNLESS OTHERWISE ENABLE NOTED INPUTS HIGH SPEED WINDOW COMPARATOR +V REF + REF - ALL RESISTORS 50 OHM UNLESS OTHERWISE NOTED REV July 22, 2002 AD53519 OUTPUTS -2.0 V AD53519 OUTPUTS AD53519 LATCH -2.0 V ENABLE INPUTS - 9 - Figure 7 Figure 8 ...

Page 10

... PRELIMINARY TECHNICAL DATA AD53519 HYSTERESIS USING POSITIVE FEEDBACK + REF R2 R1 HYSTERESIS USING LATCH ENABLE INPUT + V IN HYSTERESIS VOLTAGE 450 REV July 22, 2002 AD53519 OUTPUTS -2.0 V AD53519 OUTPUTS - -2.0 V ALL RESISTORS 50 OHM UNLESS OTHERWISE NOTED - 10 - Figure 9 Figure 10 ...

Page 11

... Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD53519 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 12

... PRELIMINARY TECHNICAL DATA AD53519 x Propagation Delay vs. Overdrive Voltage x Propagation Delay vs. Temperature x Propagation Delay vs. Common Mode Voltage x Rise Time vs. Temperature x Hysteresis vs. 'Latch x Rise and Fall of Outputs vs. Time Crossover x Fall Time vs. Temperature x Input Bias Current vs. Common Mode Voltage x Input Bias Current vs. Input Voltage x Input Bias Current vs ...

Page 13

... PRELIMINARY TECHNICAL DATA AD53519 0.048 (1.21) 0.042 0.048 (1.21) (1.07) 0.042 (1.07) 0.020 (0. REV July 22, 2002 Mechanical Outline Dimensions Dimensions shown in inches and (mm). 20-Pin PLCC 0.180 (4.57) 0.056 0.165 0.025 (0.63) (1.42) (4.19) 0.015 (0.38) 0.042 3 19 0.021 (1.07) PIN (0.53) IDENTIFIE 0.050 R 0.013 (1.27) TOP VIEW (0.33) 0.032 BSC (PINS DOWN) (0 ...

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