ad5531bru-reel Analog Devices, Inc., ad5531bru-reel Datasheet

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ad5531bru-reel

Manufacturer Part Number
ad5531bru-reel
Description
Serial Input, Voltage Output 12-/14-bit Digital-to-analog Converters
Manufacturer
Analog Devices, Inc.
Datasheet
FEATURES
Pin-compatible 12-, 14-bit digital-to-analog converters
Serial input, voltage output
Maximum output voltage range of ±10 V
Data readback
3-wire serial interface
Clear function to a user-defined voltage
Power-down function
Serial data output for daisy-chaining
16-lead TSSOP
APPLICATIONS
Industrial automation
Automatic test equipment
Process control
General-purpose instrumentation
GENERAL DESCRIPTION
The AD5530/AD5531 are single 12- and 14-bit (respectively)
serial input, voltage output digital-to-analog converters (DAC).
They utilize a versatile 3-wire interface that is compatible with
SPI®, QSPI™, MICROWIRE™, and DSP interface standards. Data
is presented to the part in a 16-bit serial word format. Serial
data is available on the SDO pin for daisy-chaining purposes.
Data readback allows the user to read the contents of the DAC
register via the SDO pin.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
12-/14-Bit Digital-to-Analog Converters
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
REFAGND
The DAC output is buffered by a gain of two amplifier and
referenced to the potential at DUTGND. LDAC can be used to
update the output of the DAC asynchronously. A power-down
pin ( PD ) allows the DAC to be put into a low power state, and
a CLR pin allows the output to be cleared to a user-defined
voltage, the potential at DUTGND.
The AD5530/AD5531 are available in 16-lead TSSOP.
REFIN
LDAC
RBEN
SDIN
Serial Input, Voltage Output
FUNCTIONAL BLOCK DIAGRAM
GND
R
SHIFT REGISTER
V
DAC REGISTER
SS
SCLK
V
©2007 Analog Devices, Inc. All rights reserved.
DD
SYNC
R
Figure 1.
AD5530/AD5531
SDO
12-/14-BIT
DAC
CONTROL LOGIC
POWER-DOWN
AD5530/AD5531
www.analog.com
R
R
V
DUTGND
CLR
PD
OUT

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ad5531bru-reel Summary of contents

Page 1

... The AD5530/AD5531 are available in 16-lead TSSOP. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 AD5530/AD5531 AD5530/AD5531 12-/14-BIT R DAC R R DAC REGISTER POWER-DOWN CONTROL LOGIC SCLK SYNC SDO Figure 1. www.analog.com ©2007 Analog Devices, Inc. All rights reserved. V OUT DUTGND CLR PD ...

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AD5530/AD5531 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 AC Performance Characteristics ................................................ 5 Standalone Timing Characteristics............................................ 5 Daisy-Chaining and Readback Timing Characteristics.......... 6 Absolute ...

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SPECIFICATIONS ± 10 −15 V ± 10%; GND = Table 1. Parameter 1 ACCURACY Resolution Relative Accuracy Differential Nonlinearity Zero-Scale Error Full-Scale Error Gain Error 2 Gain Temperature Coefficient ...

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AD5530/AD5531 ± 10 −12 V ± 10%; GND = Table 2. 1 Parameter ACCURACY Resolution Relative Accuracy Differential Nonlinearity Zero-Scale Error Full-Scale Error Gain Error Gain Temperature Coefficient 2 ...

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AC PERFORMANCE CHARACTERISTICS −10 −16.5 V; GND = otherwise noted. Table 3. Parameter DYNAMIC PERFORMANCE Output Voltage Settling Time Slew Rate Digital-to-Analog Glitch Impulse ...

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AD5530/AD5531 DAISY-CHAINING AND READBACK TIMING CHARACTERISTICS −10 −16.5 V; GND = otherwise noted. Table Parameter Limit ...

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ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 6. Parameter V to GND GND SS Digital Inputs to GND SDO to GND REFIN to REFAGND REFIN to GND REFAGND to GND DUTGND to GND ...

Page 8

AD5530/AD5531 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 7. Pin Function Descriptions Pin No. Mnemonic Description 1 REFAGND For bipolar ±10 V output range, this pin should be tied REFIN This is the voltage reference input for ...

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TYPICAL PERFORMANCE CHARACTERISTICS 1 +15V –15V 0.8 SS REFIN = +5V REFAGND = 0V 0 25°C A 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 500 1000 1500 2000 2500 CODE Figure ...

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AD5530/AD5531 3 2 POSITIVE INL 1 0 NEGATIVE INL –1 –2 –3 2.0 2.5 3.0 3.5 4.0 4.5 REFIN VOLTAGE (V) Figure 11. AD5531 Typical INL Error vs. Reference Voltage 0 –0.5 –1.0 –1.5 –2.0 –2.5 –40 – ...

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V = +15V DD V OUT V = –15V SS REFIN = +5V REFAGND = 25° 2V/DIV 2V/DIV Figure 17. Typical Power-Down Time Rev Page AD5530/AD5531 ...

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AD5530/AD5531 TERMINOLOGY Relative Accuracy Relative accuracy or endpoint linearity is a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. Differential Nonlinearity Differential nonlinearity is the difference between the ...

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THEORY OF OPERATION DAC ARCHITECTURE The AD5530/AD5531 are pin-compatible 12- and 14-bit DACs. The AD5530 consists of a straight 12-bit R-2R voltage mode DAC, and the AD5531 consists of a 14-bit R-2R section. Using reference connected to ...

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AD5530/AD5531 OUTPUT VOLTAGE The DAC transfer function is as follows × [2 × ((REFIN − REFAGND) × OUT REFAGND − REFIN] − DUTGND where the decimal data-word loaded to the DAC register the ...

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MICROPROCESSOR INTERFACING Microprocessor interfacing to the AD5530/AD5531 is via a serial bus that uses standard protocol compatible with micro- controllers and DSP processors. The communications channel is a 3-wire (minimum) interface consisting of a clock signal, a data signal, and ...

Page 16

AD5530/AD5531 LDAC is controlled by the PC6 port output. The DAC can be updated after each 2-byte transfer by bringing LDAC low. This example does not show other serial lines for the DAC. If CLR were used, it could be ...

Page 17

APPLICATIONS INFORMATION OPTOCOUPLER INTERFACE In many process control applications necessary to provide an isolation barrier between the controller and the unit being controlled. Opto-isolators can provide voltage isolation in excess of 3 kV. The serial loading structure of ...

Page 18

... AD5530BRUZ-REEL 1 −40°C to +85°C 1 AD5530BRUZ-REEL7 −40°C to +85°C AD5531BRU −40°C to +85°C AD5531BRU-REEL −40°C to +85°C AD5531BRU-REEL7 −40°C to +85°C 1 AD5531BRUZ −40°C to +85°C 1 AD5531BRUZ-REEL −40°C to +85°C 1 AD5531BRUZ-REEL7 −40°C to +85° Pb-free part ...

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NOTES Rev Page AD5530/AD5531 ...

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... AD5530/AD5531 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00938-0-1/07(B) Rev Page ...

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