ltc4269cdkd-2 Linear Technology Corporation, ltc4269cdkd-2 Datasheet - Page 11

• Manufacturer Part Number: ltc4269cdkd-2
• Description: Ieee 802.3at High Power Pd And Synchronous Forward Controller With Aux Support
• Manufacturer: Linear Technology Corporation

PIN FUNCTIONS
OC (Pin 19): OC is an accurate 107mV threshold, indepen-
dent of duty cycle, for overcurrent detection and trigger of
soft-start. Connect this pin directly to the sense resistor
in the source of the external power MOSFET.
DELAY (Pin 20): A resistor to GND adjusts the delay period
between SOUT rising edge and OUT rising edge. Used to
maximize effi ciency in forward converter applications by
adjusting the timing. Increasing the resistor value increases
the delay period.
PGND (Pin 21): Power Ground. Carries the gate driver’s
return current. Tie to V
OUT (Pin 22): Drives the Gate of an N-Channel MOSFET
Between 0V and V
OUT Pin Set by an Internal Clamp. Active pull-off exists
in shutdown (see electrical specifi cation).
V
must be closely decoupled to GND. An internal undervoltage
lockout threshold exists for V
on and 8.75V off.
SOUT (Pin 24): Switched Output in Phase with OUT Pin.
Provides sync signal for control of secondary-side FETs
in forward converter applications requiring highly effi cient
synchronous rectifi cation. SOUT is actively clamped to
12V. Active pull-off exists in shutdown (see electrical
specifi cation). Can also be used to drive the active clamp
FET of an active clamp forward supply.
IN
(Pin 23): Input Supply for the Power Supply Controller. It
IN
with a Maximum Limit of 13V on
NEG
.
IN
at approximately 14.25V
V
return line to the power supply through the internal Hot
Swap power MOSFET. Pins 26 and 27 must be electrically
tied together at the package.
PWRGD (Pin 28): Active High Power Good Output, Open
Collector. Signals that the internal Hot Swap MOSFET is
on. High Impedance indicates power is good. PWRGD is
referenced to V
and in the event of thermal overload. PWRGD is clamped
14V above V
PWRGD (Pin 29): Active Low Power Good Output, Open
Drain. Signals that the internal Hot Swap MOSFET is
on. Low Impedance indicates power is good. PWRGD
is referenced to V
inrush and in the event of thermal overload. PWRGD has
no internal clamps.
V
connected to the PD’s positive rail.
Exposed Pad (Pin 33): Tie to GND and PCB heat sink.
NEG
PORTP
(Pins 26, 27): Power Output. Connects the PoE
(Pin 32): Input Voltage Positive Rail. This pin is
NEG
NEG
.
PORTN
and is low impedance during inrush
and is high impedance during
LTC4269-2
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