ltc4269cdkd-2 Linear Technology Corporation, ltc4269cdkd-2 Datasheet - Page 17

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ltc4269cdkd-2

Manufacturer Part Number
ltc4269cdkd-2
Description
Ieee 802.3at High Power Pd And Synchronous Forward Controller With Aux Support
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIONS INFORMATION
continues to power the PD load as long as the port volt-
age does not fall below the UVLO threshold. When the
LTC4269-2 port voltage falls below the UVLO threshold,
the PD is disconnected, and classifi cation mode resumes.
C1 discharges through the LTC4269-2 circuitry.
COMPLEMENTARY POWERGOOD
When LTC4269-2 fully charges the load capacitor (C1),
power good is declared and the LTC4269-2 load can safely
begin operation. The LTC4269-2 provides complementary
power good signals that remain active during normal
operation and are deasserted when the port voltage falls
below the PoE UVLO threshold, when the voltage exceeds
the overvoltage lockout (OVLO) threshold, or in the event
of a thermal shutdown. See Figure 6.
The PWRGD pin features an open-collector output refer-
enced to V
pin of a DC/DC converter product. When power good is
declared and active, the PWRGD pin is high impedance
with respect to V
DC/DC converter from an excessive voltage.
The active low PWRGD pin connects to an internal, open-
drain MOSFET referenced to V
directly to the shutdown pin of a DC/DC converter product.
When power good is declared and active, the PWRGD pin
is low impedance with respect to V
PSE
Figure 5. LTC4269-2 Undervoltage and Overvoltage Lockout
TO
V
LTC4269-2
PORTN
NEG
V
0V TO ON*
>ON*
<UVLO*
>OVLO
*INCLUDES ON-UVLO HYSTERESIS
ON THRESHOLD 36.1V
UVLO THRESHOLD 30.7V
OVLO THRESHOLD 71.0V
PORTP
UNDERVOLTAGE
OVERVOLTAGE
which can interface directly with the “RUN”
LOCKOUT
CIRCUIT
– V
NEG
PORTN
. An internal 14V clamp protects the
POWER MOSFET
LTC4269-2
OFF
OFF
OFF
ON
PORTN
V
PORTP
V
NEG
PORTN
and can interface
.
MIN
CURRENT-LIMITED
TURN ON
5μF
C1
+
42692 F05
LOAD
PD
PWRGD PIN WHEN SHDN IS INVOKED
In PD applications where an auxiliary power supply invokes
the SHDN feature, the PWRGD pin becomes high imped-
ance. This prevents the PWRGD pin that is connected to
the “RUN” pin of the DC/DC converter from interfering
with the DC/DC converter operations when powered by
an auxiliary power supply.
OVERVOLTAGE LOCKOUT
The LTC4269-2 includes an Overvoltage Lockout (OVLO)
feature (Figure 5) which protects the LTC4269-2 and its
load from an overvoltage event. If the input voltage ex-
ceeds the OVLO threshold, the LTC4269-2 discontinues
PD operation. Normal operations resume when the input
voltage falls below the OVLO threshold and when C1 is
charged up.
THERMAL PROTECTION
The IEEE 802.3af/at specifi cation requires a PD to withstand
any applied voltage from 0V to 57V indefi nitely. However,
Figure 6. LTC4269-2 Power Good Functional and State Diagram
V
V
PORTN
PORTN
5
6
LTC4269-2
OVLO
UVLO
TSD
ON
BOLD LINE INDICATES HIGH CURRENT PATH
POWER
GOOD
NOT
AND NOT IN THERMAL SHUTDOWN
CONTROL
CIRCUIT
OR THERMAL SHUTDOWN
ON < V
INRUSH COMPLETE
V
V
PORTP
PORTP
PORTP
< UVLO
> OVLO
< OVLO
POWER
GOOD
LTC4269-2
42692 F06
29
28
27
26
PWRGD
PWRGD
V
V
NEG
NEG
17
42692f

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