ltc4266a Linear Technology Corporation, ltc4266a Datasheet
ltc4266a
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ltc4266a Summary of contents
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... LTPoE ++ PSE and LTPoE ++ PD while remaining compatible and interoperable with existing Type 1 (13W) and Type 2 (25.5W) PDs. The LTC4266A feature set is a superset of the popular LTC4266. These PSE controllers feature low R 0.25Ω sense resistors which are especially important at the LTPoE ++ current levels to maintain the lowest possible heat dissipation ...
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... LTC4266AIUHF-1#TRPBF LTC4266AIUHF-2#PBF LTC4266AIUHF-2#TRPBF LTC4266AIUHF-3#PBF LTC4266AIUHF-3#TRPBF LTC4266AIUHF-4#PBF LTC4266AIUHF-4#TRPBF Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. ...
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... GATE Pin Pull-Down Current GATE Pin Fast Pull-Down Current GATE Pin On Voltage Output Voltage Sense V Power Good Threshold Voltage PG OUT Pin Pull-Up Resistance to AGND LTC4266A/LTC4266C l The denotes the specifications which apply over the full operating = 25°C. AGND – 54V, AGND = DGND, and CONDITIONS AGND – ...
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... LTC4266A/LTC4266C ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T unless otherwise noted. (Notes 3, 4) SYMBOL PARAMETER Current Sense V Overcurrent Sense Voltage CUT Overcurrent Sense in AUTO Pin Mode V Active Current Limit in 802.3af Compliant LIM Mode V Active Current Limit in High Power Mode LIM ...
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... SHDN Watchdog Timer Duration Minimum Pulse Width for Masked Shut Down Minimum Pulse Width for SHDN Minimum Pulse Width for RESET LTC4266A/LTC4266C l The denotes the specifications which apply over the full operating = 25°C. AGND – 54V, AGND = DGND, and ...
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... Note 3: All currents into device pins are positive; all currents out of device pins are negative. Note 4: The LTC4266A/LTC4266C operates with a negative supply voltage (with respect to ground). To avoid confusion, voltages in this data sheet are referred to in terms of absolute magnitude. ...
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... V Supply Current vs Voltage EE 2.4 2.3 25°C 85°C 2.2 –40°C 2.1 2.0 4.3 –60 –55 –50 –45 –40 –35 –30 –25 – SUPPLY VOLTAGE (V) LTC4266A/LTC4266C 802.3af Classification in AUTO Pin Mode GND LOAD FULLY CHARGED –18.4 PORT 1 PORT V = 3.3V VOLTAGE –55V 10V/DIV CLASS 1 ...
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... LTC4266A/LTC4266C TYPICAL PERFORMANCE CHARACTERISTICS 802.3af I Threshold LIM vs Temperature 108. 3. –54V 0.25Ω SENSE REG 48h = 80h 107.25 PORT 1 106.50 105.75 105.00 – TEMPERATURE (°C) 802.3af I Threshold CUT vs Temperature 96. 3. –54V 0.25Ω SENSE REG 47h = D4h 95.25 PORT 1 94.50 93.75 93.00 – TEMPERATURE (° ...
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... V EE GATE VOLTAGE V 10V/DIV EE FAULT PORT APPLIED CURRENT 500mA/DIV 0mA 4266AC G23 LTC4266A/LTC4266C ADC Noise Histogram Port Voltage Readback in Fast Mode 600 AGND – 48.3V OUTn 500 400 300 200 100 0 260 261 262 500 263 ADC OUTPUT ADC Integral Nonlinearity Voltage Readback in Slow Mode 1 ...
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... LTC4266A/LTC4266C TEST TIMING DIAGRAMS V PORTn INT Figure 1. Detect, Class and Turn-On Timing in AUTO Pin or Semi-auto Modes V LIM V CUT SENSEn EE 0V INT Figure 2. Current Limit Timing V GATEn t MSD t SHDN MSD or SHDNn 4266AC F04 Figure 4. Shut Down Delay Timing 10 t CLASSIFICATION DET ...
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... I C TIMING DIAGRAMS LTC4266A/LTC4266C 4266acfa 11 ...
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... LTC4266A/LTC4266C TIMING DIAGRAMS SCL SDA 0 1 START BY MASTER SERIAL BUS ADDRESS BYTE SCL SDA START BY MASTER ALERT RESPONSE ADDRESS BYTE 12 AD3 AD2 AD1 AD0 R/W ACK ACK BY SLAVE FRAME 1 DATA BYTE Figure 8. Reading the Interrupt Register (Short Form) ...
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... RESET can be connected to an external capacitor or RC network to provide a power turn-on delay. Internal filtering of the RESET pin prevents glitches less than 1μs wide from resetting the LTC4266A/ LTC4266C. Internally pulled MID: Midspan Mode Input. When high, the LTC4266A/ LTC4266C acts as a midspan device ...
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... GATE1: Port 1 Gate Drive. See GATE 4. OUT1: Port 1 Output Voltage Monitor. See OUT4. AUTO: AUTO Pin Mode Input. AUTO pin mode allows the LTC4266A/LTC4266C to detect and power even if there is no host controller present on the I voltage of the AUTO pin determines the state of the internal ...
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... Even during the process of creating the IEEE PoE + 25.5W specification, it became clear that there was a significant and increasing need for more than 25.5W of delivered power. The LTC4266A family responds to this market by allowing a reliable means of providing up to 90W of deliv- ered power to a LTPoE ++ PD. The LTPoE ++ specification ...
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... PSEs that support them) are known as Type 2. Older 13W 802.3af equipment is classified as Type 1. Type 1 PDs will work with all PSEs; Type 2 PDs may require Type 2 PSEs to work properly. The LTC4266A/LTC4266C is designed to work in both Type 1 and Type 2 PSE de- signs, and also supports non-standard configurations at higher power levels. • ...
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... Classification to negotiate power with LTPoE ++ PSEs; this greatly simplifies high-power PD implementations. LTPoE ++ classification may be optionally enabled for the LTC4266A by setting both the High Power Enable and LTPoE ++ Enable bits. The higher levels of LTPoE ++ delivery impose additional layout and component selection constraints. The LTC4266A ...
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... CUT CLASS Class 1 Class 2 Class 3 or Class 0 Class 4 The automatic setting of the I occurs if the LTC4266A/LTC4266C is reset with the AUTO pin high. If the standalone application is a midspan, the MID pin should CUT be tied high to enable correct midspan detection timing. DETECTION Detection Overview ...
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... Voltage > 10V More On Operating Modes The port’s operating mode determines when the LTC4266A/ LTC4266C runs a detection cycle. In manual mode, the port will idle until the host orders a detect cycle. It will then run detection, report the results, and return to idle to wait for another command ...
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... OUTn pin and measuring the resulting current; it then reports the discovered class in the Port Status register. If the LTC4266A/LTC4266C is in AUTO pin mode, it will additionally use the classification result to set the I and I thresholds ...
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... LTC4266A. A Type 2 PD that is requesting more than 13W will indicate Class 4 during normal 802.3af classification. If the LTC4266A sees Class 4, it forces the port to a speci- fied lower voltage (called the mark voltage, typically 9V), pauses briefly, and then re-runs classification to verify the Class 4 reading (Figure 1) ...
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... typically set to a lower value than I CUT port to tolerate minor faults without current limiting. Per the IEEE specification, the LTC4266A/LTC4266C will automatically set I to 425mA (shown in bold in Table 6) LIM during inrush at port turn-on, and then switch to the programmed I setting once inrush has completed ...
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... LTC4266A/LTC4266C SENSE pin to rise to an abnormally high voltage. A failed MOSFET may also short from gate to drain, causing the LTC4266A/ LTC4266C GATE pin to rise to an abnormally high voltage. The LTC4266A/LTC4266C OUT, SENSE and GATE pins are designed to tolerate up to 80V faults without damage ...
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... LTC4266C circuitry, and draws a maximum of 3mA. A and ceramic decoupling cap of at least 0.1μF should be placed from V to DGND, as close as practical to each LTC4266A/ DD LTC4266C chip. Figure 14 shows a three component low dropout regula- tor for a negative supply to DGND generated from the negative V supply ...
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... Ethernet subsystem (including all LTC4266A/LTC4266Cs) must be electrically isolated from the rest of the system. Figure 16 shows a typical isolated serial interface. The SDAOUT pin of the LTC4266A/LTC4266C is designed to drive the inputs of an opto-coupler directly. Standard I SMBus devices typically cannot drive opto-couplers used to buffer the signals from the host controller side. ...
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... LTC4266A/LTC4266C APPLICATIONS INFORMATION V CPU DD U1 SCL SDA TO CONTROLLER SMBALERT GND CPU U1: FAIRCHILD NC7WZ17 U2, U3: AGILENT HCPL-063L 26 0.1μ 200Ω 2k 200Ω HCPL-063L U3 200Ω 200Ω 0.1μF HCPL-063L ISOLATED 3.3V + 10μF ISOLATED GND 2 Figure 16. Opto-Isolating the I C Bus 0.1μ ADDRESS ...
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... The LTC4266A/LTC4266C is designed to use either 0.5Ω or 0.25Ω current sense resistors. For new designs 0.25Ω is recommended to reduce power dissipation; the 0.5Ω op- tion is intended for existing systems where the LTC4266A/ LTC4266C is used as a drop-in replacement for the LTC4258 or LTC4259A. The lower sense resistor values reduce heat dissipation. Four commonly available 1Ω ...
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... LTC4266A/LTC4266C PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ 5.50 0.05 4.10 0.05 3.00 REF 5.00 0.10 PIN 1 TOP MARK (SEE NOTE 6) 7.00 0.10 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE M0-220 VARIATION WHKD 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 28 for the most recent package drawings. UHF Package 38-Lead Plastic QFN (5mm × 7mm) (Reference LTC DWG # 05-08-1701 Rev C) 5.15 ± ...
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... Related Parts Table CUT/LIM changed to I Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC4266A/LTC4266C 2 C compliance). /I ...
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... LTC4266A/LTC4266C TYPICAL APPLICATION 200Ω V CPU DD U1 SCL 200Ω SDA HCPL-063L INTERRUPT 0.1μF GND CPU HCPL-063L Figure 17. One Complete Isolated Powered Ethernet Port RELATED PARTS PART NUMBER DESCRIPTION 12-Port PoE/PoE + /LTPoE ++ PSE Controller LTC4270/LTC4271 LTC4266 Quad IEEE 802.3at PoE PSE Controller LTC4274 Single IEEE 802 ...