ltc6993-1 Linear Technology Corporation, ltc6993-1 Datasheet - Page 18

• Manufacturer Part Number: ltc6993-1
• Description: Electrical Specifications Subject To Change
• Manufacturer: Linear Technology Corporation

LTC6993-1/LTC6993-2
LTC6993-3/LTC6993-4
applicaTions inForMaTion
I
When operating with I
1.25µA to 20µA range, the master oscillator operates
outside of the 62.5kHz to 1MHz range in which it is most
accurate.
The oscillator will still function with reduced accuracy for
I
stop. Under this condition, the output pulse can still be
initiated, but will not terminate until I
the master oscillator starts again.
At the other extreme, it is not recommended to operate
the master oscillator beyond 2MHz because the accuracy
of the DIV pin ADC will suffer.
Settling Time
Following a 2× or 0.5× step change in I
pulse width takes approximately six master clock cycles
(6 • t
An example is shown in Figure 10, using the circuit in
Figure 8.
Coupling Error
The current sourced by the SET pin is used to bias the in-
ternal master oscillator. The LTC6993 responds to changes
in I
settling time. However, this fast response also makes the
SET pin sensitive to coupling from digital signals, such
as the TRIG input.
Even an excellent layout (examples are provided in the
next section) will allow some coupling between TRIG and

SET
SET
PULSE WIDTH
SET
< 1.25µA. At approximately 500nA, the oscillator will
Extremes (Master Oscillator Frequency Extremes)
2µs/DIV
MASTER
2V/DIV
5V/DIV
5V/DIV
V
TRIG
CTRL
OUT
almost immediately, which provides excellent
LTC6993-1
V
DIVCODE = 0
R
R
t
OUT
+
SET
MOD
) to settle to within 1% of the final value.
= 3.3V
= 3µs AND 6µs
= 200k
Figure 10. Typical Settling Time
= 464k
SET
20µs/DIV
outside of the recommended
SET
69931234 F10
SET
increases and
, the output
SET that can affect fast output pulses. Additional error is
included in the specified accuracy for N
for this.
A very poor layout can actually degrade performance
further. The PCB layout should avoid routing SET next to
TRIG (or any other fast-edge, wide-swing signal).
Power Supply Current
The Electrical Characteristics table specifies the supply
current while the part is idle (waiting to be triggered).
I
voltage. Once triggered, the supply current increases while
the timing circuit is active:
Using the following equations, the typical supply current
can be calculated under any conditions. The increase in
current ∆I
percentage of time that the circuit is active, which can be
expressed as a duty cycle. For example, if t
the input is triggered every 2µs, the output duty cycle will
be 50%, which is the same amount of time the LTC6993 is
active. Note that these equations account for load capaci-
tance, but ignore resistive loads for simplicity.
If N
If N
I
I
∆
∆
S(IDLE)
S IDLE
S IDLE
(
I
(
I
I
S ACTIVE
S S ACTIVE
S(ACTIVE)
DIV
DIV
(
(
)
)
≤ 64 (DIVCODE = 0-2, 13-15):
≥ 512 (DIVCODE = 3-12):
=
varies with the programmed t
=
+
S(ACTIVE)
t
t
MASTER
2 2
)
MASTER
)
. •
≅
≅
V
= I
V
•
+
DutyCycle
DutyCycle
+



S(IDLE)
I I
SET
t
MASTER
•
depends on the output loading and the
V
•
7
+
7
+
pF
pF
50
+ ∆I
+
µA
+
•
•
t
t
S(ACTIVE)
5
500
V
OUT
V
OUT
pF
+
V
+
+
+
k
•
•
Ω
4
t
C
V
OUT
pF
LOAD
+
+ +
1 8
+
OUT
. •
• 20
500
(
DIV
V
I
and the supply
SET
+
= 1 to account
pF C
k
OUT
Ω
+
+
= 1µs and
50
LOAD
69931234p
µA
)


