ad73311 Analog Devices, Inc., ad73311 Datasheet - Page 26

• Manufacturer Part Number: ad73311
• Description: Low Cost, Low Power Cmos General Purpose Analog Front End
• Manufacturer: Analog Devices, Inc.

AD73311
Cascade Operation
Where it is required to configure a cascade of up to eight de-
vices, it is necessary to ensure that the timing of the SE and
RESET signals is synchronized at each device in the cascade. A
simple D type flip flop is sufficient to sync each signal to the
master clock MCLK, as in Figure 30.
Connection of a cascade of devices to a DSP, as shown in Fig-
ure 31, is no more complicated than connecting a single device.
Instead of connecting the SDO and SDOFS to the DSP’s Rx
port, these are now daisy-chained to the SDI and SDIFS of the
next device in the cascade. The SDO and SDOFS of the final
device in the cascade are connected to the DSP’s Rx port to
complete the cascade. SE and RESETB on all devices are fed
from the signals that were synchronized with the MCLK using
the circuit as described above. The SCLK from only one device
need be connected to the DSP’s SCLK input(s) as all devices
will be running at the same SCLK frequency and phase.
ADSP-2181
FL0
DSP CONTROL
TO SE
DSP CONTROL
TO RESET
DSP
MCLK
MCLK
FL1
D2
D1
74HC74
TFS
DT
SCLK
DR
RFS
CLK
D
CLK
D
CLK
74HC74
74HC74
RESET
1/2
1/2
Q1
Q2
Q
Q
SDOFS
SDOFS
SDIFS
SCLK
SDIFS
SCLK
SDO
SDO
SE SIGNAL SYNCHRONIZED
TO MCLK
RESET SIGNAL SYNCHRONIZED
TO MCLK
SDI
SDI
AD73311
AD73311
DEVICE 1
DEVICE 2
CODEC
CODEC
SE
SE
MCLK
RESET
MCLK
RESET
Grounding and Layout
Since the analog inputs to the AD73311 are differential, most of
the voltages in the analog modulator are common-mode volt-
ages. The excellent common-mode rejection of the part will
remove common-mode noise on these inputs. The analog and
digital supplies of the AD73311 are independent and separately
pinned out to minimize coupling between analog and digital
sections of the device. The digital filters on the encoder section
will provide rejection of broadband noise on the power supplies,
except at integer multiples of the modulator sampling frequency.
The digital filters also remove noise from the analog inputs
provided the noise source does not saturate the analog modula-
tor. However, because the resolution of the AD73311’s ADC is
high, and the noise levels from the AD73311 are so low, care
must be taken with regard to grounding and layout.
The printed circuit board that houses the AD73311 should be
designed so the analog and digital sections are separated and
confined to certain sections of the board. The AD73311 pin
configuration offers a major advantage in that its analog and
digital interfaces are connected on opposite sides of the package.
This facilitates the use of ground planes that can be easily sepa-
rated, as shown in Figure 32. A minimum etch technique is
generally best for ground planes as it gives the best shielding.
Digital and analog ground planes should be joined in only one
place. If this connection is close to the device, it is recom-
mended to use a ferrite bead inductor as shown in Figure 32.
Avoid running digital lines under the device for they will couple
noise onto the die. The analog ground plane should be allowed
to run under the AD73311 to avoid noise coupling. The power
supply lines to the AD73311 should use as large a trace as pos-
sible to provide low impedance paths and reduce the effects of
glitches on the power supply lines. Fast switching signals such as
clocks should be shielded with digital ground to avoid radiating
noise to other sections of the board, and clock signals should
never be run near the analog inputs. Traces on opposite sides of
the board should run at right angles to each other. This will
reduce the effects of feedthrough through the board. A microstrip
technique is by far the best but is not always possible with a
double-sided board. In this technique, the component side of
the board is dedicated to ground planes while signals are placed
on the other side.
DIGITAL GROUND
ANALOG GROUND