mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet

mt47h128m16hg-3-it

Manufacturer Part Number

mt47h128m16hg-3-it

Description

2gb X4, X8, X16 Ddr2 Sdram

Manufacturer

Micron Semiconductor Products

Datasheet

1.MT47H128M16HG-3-IT.pdf (127 pages)

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DDR2 SDRAM

MT47H512M4 – 64 Meg x 4 x 8 banks

MT47H256M8 – 32 Meg x 8 x 8 banks

MT47H128M16 – 16 Meg x 16 x 8 banks

For the latest data sheet, refer to Micron’s Web site:

Features

• RoHS compliant

• V

• JEDEC standard 1.8V I/O (SSTL_18-compatible)

• Differential data strobe (DQS, DQS#) option

• 4-bit prefetch architecture

• Duplicate output strobe (RDQS) option for x8

• DLL to align DQ and DQS transitions with CK

• 8 internal banks for concurrent operation

• Programmable CAS latency (CL)

• Posted CAS additive latency (AL)

• WRITE latency = READ latency – 1

• Programmable burst lengths: 4 or 8

• Adjustable data-output drive strength

• 64ms, 8,192-cycle refresh

• On-die termination (ODT)

• Industrial temperature (IT) option

• Supports JEDEC clock jitter specification

Table 1:

PDF: 09005aef824f87b6/Source: 09005aef824f1182

2gb_ddr2.fm - Rev. A 9/06 EN

Configuration

Refresh count

Row addr.

Bank addr.

Column addr.

Architecture

= +1.8V ±0.1V, V

Configuration Addressing

2K (A0–A9, A11)

Products and specifications discussed herein are subject to change by Micron without notice.

512 Meg x 4

32K (A0–A14)

8 (BA0–BA2)

64 Meg x 4

x 8 banks

Q = +1.8V ±0.1V

32K (A0–A14)

256 Meg x 8

8 (BA0–BA2)

1K (A0–A9)

32 Meg x 8

x 8 banks

128 Meg x 16

16K (A0–A13)

8 (BA0–BA2)

16 Meg x 16

1K (A0–A9)

x 8 banks

www.micron.com/ddr2

Table 2:

Note: CL = CAS latency.

Options

• Configuration

• FBGA package (lead-free)

• Timing – cycle time

• Self refresh

• Operating temperature

• Revision

Speed

Grade

512 Meg x 4 (64 Meg x 4 x 8 banks )

256 Meg x 8 (32 Meg x 8 x 8 banks)

128 Meg x 16 (16 Meg x 16 x 8 banks)

84-ball FBGA (11.5mm x 14mm) (:A)

60-ball FBGA (11.5mm x 14mm) (:A)

5.0ns @ CL = 3 (DDR2-400)

3.75ns @ CL = 4 (DDR2-533)

3.0ns @ CL = 5 (DDR2-667)

3.0ns @ CL = 4 (DDR2-667)

Standard

Low-power

Commercial (0°C ≤ T

Industrial (–40°C ≤ T

-37E

-5E

-3E

-3

Micron Technology, Inc., reserves the right to change products or specifications without notice.

CL = 3 CL = 4 CL = 5 CL = 6

400

N/A

400

Key Timing Parameters

2Gb: x4, x8, x16 DDR2 SDRAM

Data Rate (MHz)

400

533

667

≤ 95°C; –40°C ≤ T

≤ 85°C)

N/A

667

N/A

≤ 85°C)

(ns)

RCD

Marking

Features

(ns)

128M16

512M4

256M8

None

-37E

-5E

-3E

-3

(ns)

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