ics83052 Integrated Device Technology, ics83052 Datasheet

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ics83052

Manufacturer Part Number
ics83052
Description
Lvcmos-input Lvcmos-output 2 1 250-mhz Clock Mux
Manufacturer
Integrated Device Technology
Datasheet

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2:1, SINGLE-ENDED MULTIPLEXER
G
making the device ideal for use in voltage trans-lation applica-
tions. An output enable pin places the output in a high imped-
ance state which may be useful for testing or debug. The device
operates up to 250MHz and is packaged in an 8 TSSOP.
B
IDT
output has a V
HiPerClockS™
IC S
LOCK
ENERAL
/ ICS
CLK0
CLK1
SEL0
2:1, SINGLE-ENDED MULTIPLEXER
OE
D
The ICS83052I is a low skew, 2:1, Single-ended
Multiplexer and a member of the HiPerClockS™ fam-
ily of High Performance Clock Solutions from IDT.
The ICS83052I has two selectable single-ended
clock inputs and one single-ended clock output. The
IAGRAM
DDO
D
ESCRIPTION
pin which may be set at 3.3V, 2.5V, or 1.8V,
Q
1
P
F
• 2:1 single-ended multiplexer
• Q nominal output impedance: 15
• Maximum output frequency: 250MHz
• Propagation delay: 2.7ns (maximum), (V
• Input skew: 160ps (maximum), (V
• Part-to-part skew: 490ps (maximum), (V
• Additive phase jitter, RMS at 155.52MHz (12kHz - 20MHz):
• Operating supply modes:
• -40°C to 85°C ambient operating temperature
• Available in standard (RoHS 5) and lead-free (RoHS 6)
0.18ps (typical), (V
V
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
IN
EATURES
packages
DD
/V
A
DDO
SSIGNMENT
4.40mm x 3.0mm x 0.925mm
DD
CLK1
GND
V
V
DDO
8-Lead TSSOP
= V
DD
package body
ICS83052I
G Package
Top View
DDO
1
2
3
4
ICS83052AGI REV. B MARCH 16, 2007
= 3.3V)
8
7
6
5
DD
Q
SEL0
CLK0
OE
(V
= V
DDO
DDO
DD
= 3.3V)
DD
ICS83052I
= V
= V
= 3.3V)
DDO
DDO
= 3.3V)
= 3.3V)

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ics83052 Summary of contents

Page 1

... SINGLE-ENDED MULTIPLEXER G D ENERAL ESCRIPTION The ICS83052I is a low skew, 2:1, Single-ended IC S Multiplexer and a member of the HiPerClockS™ fam- ily of High Performance Clock Solutions from IDT. HiPerClockS™ The ICS83052I has two selectable single-ended clock inputs and one single-ended clock output. The output has a V pin which may be set at 3 ...

Page 2

... ICS83052AGI REV. B MARCH 16, 2007 ...

Page 3

... µ µ A ICS83052AGI REV. B MARCH 16, 2007 ...

Page 4

... ICS83052AGI REV. B MARCH 16, 2007 µ A µ A µ A µ ...

Page 5

... ICS83052AGI REV. B MARCH 16, 2007 ...

Page 6

... ICS83052AGI REV. B MARCH 16, 2007 ...

Page 7

... ARRIER REQUENCY Z than the noise floor of the device. This is illustrated above. The device meets the noise floor of what is shown, but can actually be lower. The phase noise is dependant on the input source and measurement equipment 0.18ps (typical) 10M 100M ) ICS83052AGI REV. B MARCH 16, 2007 ...

Page 8

... IRCUIT ORE Part 1 SCOPE Qx Qx Part IRCUIT ART NFORMATION SCOPE Qx /2. UTPUT OAD EST IRCUIT 0.9V±5% V DDO Qx GND -0.9V±5% /1. UTPUT OAD EST IRCUIT V DDO 2 V DDO 2 tsk(pp) S ART KEW ICS83052AGI REV. B MARCH 16, 2007 SCOPE ...

Page 9

... SINGLE-ENDED MULTIPLEXER DDO Clock 2 Outputs UTPUT Q – t PD1 O D UTPUT 9 80% 80% 20 ISE ALL IME V DDO PERIOD 100% odc = t PERIOD UTY YCLE ULSE IDTH ERIOD ICS83052AGI REV. B MARCH 16, 2007 20% ...

Page 10

... A 1k resistor can be used ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS83052I is: 967 IDT ™ / ICS ™ 2:1, SINGLE-ENDED MULTIPLEXER A I PPLICATION NFORMATION I P NPUT INS R I ELIABILITY NFORMATION ...

Page 11

... ° Reference Document: JEDEC Publication 95, MO-153 ° ICS83052AGI REV. B MARCH 16, 2007 ...

Page 12

... ICS83052AGI REV. B MARCH 16, 2007 ° ° ° ° ...

Page 13

... ICS83052AGI REV. B MARCH 16, 2007 ...

Page 14

... ICS83052I 2:1, SINGLE-ENDED MULTIPLEXER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) © ...

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