ics932s421 Integrated Device Technology, ics932s421 Datasheet - Page 11

• Manufacturer Part Number: ics932s421
• Description: Pcie Gen 2 & Fbd Compliant Ck410b Ck410b+ Clock For Intel-based Servers
• Manufacturer: Integrated Device Technology

How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the begining byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
1340B—06/13/07
Byte N + X -1
(see Note 2)
WR
T
P
Beginning Byte N
General SMBus serial interface information for the ICS932S421B
Data Byte Count = X
Slave Address D2
Beginning Byte = N
Controller (Host)
Byte N + X - 1
Index Block Write Operation
Integrated
Circuit
Systems, Inc.
starT bit
stoP bit
WRite
(H)
ICS (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(H)
11
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D3
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
WR
RD
RT
N
T
P
Slave Address D2
Slave Address D3
Beginning Byte = N
Controller (Host)
Index Block Read Operation
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(H)
(H)
.
ICS (Slave/Receiver)
Data Byte Count = X
ICS932S421B
Beginning Byte N
Byte N + X - 1
ACK
ACK
ACK
(H)
(H)
(H)