ics932s421 Integrated Device Technology, ics932s421 Datasheet - Page 14

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ics932s421

Manufacturer Part Number
ics932s421
Description
Pcie Gen 2 & Fbd Compliant Ck410b Ck410b+ Clock For Intel-based Servers
Manufacturer
Integrated Device Technology
Datasheet

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1340B—06/13/07
SMBus Table: Byte Count Register
SMBus Table: Device ID Register
SMBus Table: M/N Programming & Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 10
Byte 8
Byte 9
Integrated
Circuit
Systems, Inc.
SRC, PCI
CPU
CPU
54
55
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
SRC Alternate Frequency (96% of
CPU Alternate Frequency (96% of
Nominal) Only active if latched
frequency is 166 MHz or 333
REF1 Drive Strength
REF0 Drive Strength
CPU_STOP Control
Nominal)
M/N_EN
Name
Name
Name
MHz.
DID7
DID6
DID5
DID4
DID3
DID2
DID1
DID0
BC7
BC6
BC5
BC4
BC3
BC2
BC1
BC0
Byte Count Programming
Stop non-free running PC
Set SRC = 96 MHz and
166 MHz to 160 MHz
333 MHz to 320 MHz
Control Function
Control Function
Control Function
M/N Programming
Set alternate CPU
Byte 10, bit 2 = 1
and SRC clocks.
14
CPU and SRC
PCI = 32 MHz
Only active if
frequency:
Device ID
(2B hex)
1X or 2X
1X or 2X
RESERVED
RESERVED
Enable
b(7:0)
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
configure how many bytes will
Writing to this register will
be read back, default is 8
See REF Drive Strength
Disable
Normal
Normal
Stop
Functionality Table
0
0
0
-
-
-
-
-
-
-
-
(0 to 7)
bytes.
ICS932S421B
Frequency
Frequency
Alternate
Alternate
Enable
Run
1
1
1
-
-
-
-
-
-
-
-
PWD
PWD
PWD
0
0
0
0
0
1
1
1
0
0
1
0
1
0
1
1
0
1
0
0
0
0
1
1

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