mpc962308dt-5h Freescale Semiconductor, Inc, mpc962308dt-5h Datasheet

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mpc962308dt-5h

Manufacturer Part Number
mpc962308dt-5h
Description
Zero Delay Buffer
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
3.3 V Zero Delay Buffer
high-speed clocks in PC, workstation, datacom, telecom and other
high-performance applications. The MPC962308 uses an internal PLL and an
external feedback path to lock its low-skew clock output phase to the reference
clock phase, providing virtually zero propagation delay. The input-to-output
skew is guaranteed to be less than 250 ps and output-to-output skew is
guaranteed to be less than 200 ps.
Features
Functional Description
Input
applied to the output for chip and system testing purposes. The MPC962308 PLL enters a power down state when there are no rising
edges on the REF input. During this state, all of the outputs are in tristate and there is less than 50 µA of current draw. The PLL shuts
down in two additional cases explained in
between the output skews of two devices will be less than 700 ps.
MPC962308-1, the reference frequency is reproduced by the PLL and provided at the outputs. A high drive version of this configura-
tion, the MPC962308-1H, is available to provide faster rise and fall times of the device.
and 2X the reference frequency at the output banks. The output banks driving the feedback will determine the different configurations
of the above devices. The MPC962308-4 provides outputs 2X the reference frequency.The MPC962308-5H is a high drive version
with outputs of REF/2.
signals while the outputs provide LVCMOS compatible levels with the capability to drive terminated 50 Ω transmission lines on the
incident edge. Depending on the configuration, the device is offered in a 16-lead SOIC or 16-lead TSSOP package.
© Motorola, Inc. 2004
The MPC962308 is a 3.3 V Zero Delay Buffer designed to distribute
The MPC962308 has two banks of four outputs each which can be controlled by the select inputs as shown in
Multiple MPC962308 devices can accept and distribute the same input clock throughout the system. In this situation, the difference
The MPC962308 is available in five different configurations as shown in
The MPC962308-2 provides 2X and 1X the reference frequency at the output banks. In addition, the MPC962308-3 provides 4X
The MPC962308 is fully 3.3 V compatible and requires no external components for the internal PLL. All inputs accept LVCMOS
1:8 outputs LVCMOS zero-delay buffer
Zero input-output propagation delay, adjustable by the capacitive load on
FBK input
Multiple Configurations, see
Configurations
Multiple low-skew outputs
200 ps max output-output skew
700 ps max device-device skew
Two banks of four outputs, output tristate control by two select inputs
Supports a clock I/O frequency range of 10 MHz to 133 MHz
Low jitter, 200 ps max cycle-cycle (-1, -1H, -4, -5H)
±250 ps static phase offset (SPO)
16-pin SOIC package or 16-pin TSSOP package
Single 3.3 V supply
Ambient temperature range: –40°C to +85°C
Compatible with the CY2308 and CY23S08
Spread spectrum compatible
Decoding. Bank B can be tristated if all of the outputs are not required. The select inputs also allow the input clock to be directly
Table 2. Available MPC962308
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 1. Select Input
Go to: www.freescale.com
Decoding.
Table 2. Available MPC962308
16-LEAD TSSOP PACKAGE
MPC962308
16-LEAD SOIC PACKAGE
CASE 751B-05
CASE 948F-01
DT SUFFIX
D SUFFIX
Order number: MPC962308
Configurations. In the
Table 1. Select
Rev 3, 08/2004

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mpc962308dt-5h Summary of contents

Page 1

... Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3.3 V Zero Delay Buffer The MPC962308 is a 3.3 V Zero Delay Buffer designed to distribute high-speed clocks in PC, workstation, datacom, telecom and other high-performance applications. The MPC962308 uses an internal PLL and an external feedback path to lock its low-skew clock output phase to the reference clock phase, providing virtually zero propagation delay ...

Page 2

... Freescale Semiconductor, Inc. Block Diagram /2 PLL REF /2 Extra Divider (-3, -4) Extra Divider (-5H) S2 Select Input Decoding S1 Extra Divider (-2, -3) Table 1. Select Input Decoding Outputs inverted on MPC962308-2 in bypass mode, S2=1 and S1=0. Table 2. Available MPC962308 Configurations Device Feedback From ...

Page 3

... Freescale Semiconductor, Inc. MPC962308 Table 3. Pin Description Pin 1 1 REF 2 2 CLKA1 3 2 CLKA2 GND 6 2 CLKB1 7 2 CLKB2 CLKB3 11 2 CLKB4 12 GND CLKA3 15 2 CLKA4 16 FBK 1. Weak pull-down. 2. Weak pull-down on all outputs. ...

Page 4

... Freescale Semiconductor, Inc. Table 5. Operating Conditions for MPC962308-X Industrial Temperature Devices Parameter V Supply Voltage DD T Operating Temperature (Ambient Temperature Load Capacitance, below 100 MHz L Load Capacitance, from 100 MHz to 133 MHz C 1 Input Capacitance IN 1. Applies to both REF clock and FBK. ...

Page 5

... Freescale Semiconductor, Inc. MPC962308 Table 7. Switching Characteristics for MPC962308-X Industrial Temperature Devices Parameter Name t Output Frequency Output Frequency Output Frequency 1 2 ÷ t Duty Cycle = (-1, -2, -3, -4, -1H, -5H) 2 ÷ t Duty Cycle = (-1, -2, -3, -4, -1H, -5H Rise Time ...

Page 6

... Freescale Semiconductor, Inc The pin-to-pin skew is defined as the worst case difference in propagation delay between any similar delay path within a single device Figure 1. Output-to-Output Skew 100 The time from the PLL controlled edge to the non-controlled ...

Page 7

... MPC962308D-1HR2 MPC962308DT-1H MPC962308DT-1HR2 MPC962308D-2 MPC962308D-2R2 Ordering Information (Planned) Ordering Code MPC962308D-3 MPC962308D-3R2 MPC962308D-4 MPC962308D-4R2 MPC962308D-5H MPC962308D-5HR2 MPC962308DT-5H MPC962308DT-5HR2 MOTOROLA 0.1 µF CLK OUT C LOAD 0.1 µF Test Circuit for t 8 Package Name D16 16-pin 150-mil SOIC D16 16-pin 150-mil SOIC — Tape and Reel ...

Page 8

... Freescale Semiconductor, Inc. 0. 6.2 8X PIN'S 5.8 NUMBER 1 16 PIN 1 INDEX 4.0 B 3.8 5 0.50 X45˚ 0.25 TIMING SOLUTIONS PACKAGE DIMENSIONS D SUFFIX 16 LEAD SOIC PACKAGE CASE 751B-05 ISSUE K 1.75 A 1.35 0.25 0.10 0.49 16X 0.35 0.25 14X 1.27 10.0 9.8 SEATING T PLANE 16X 0.1 T 0.25 0.19 1.25 7˚ 0.40 0˚ SECTION A-A 8 For More Information On This Product, Go to: www.freescale.com ...

Page 9

... Freescale Semiconductor, Inc. MPC962308 K 16X 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 -V- C 0.10 (0.004) -T- SEATING D PLANE MOTOROLA PACKAGE DIMENSIONS DT SUFFIX 16 LEAD TSSOP PACKAGE CASE 948F-01 ISSUE O REF SECTION N-N - 0.25 (0.010 DETAIL E ...

Page 10

... Freescale Semiconductor, Inc. TIMING SOLUTIONS NOTES 10 For More Information On This Product, Go to: www.freescale.com MPC962308 MOTOROLA ...

Page 11

... Freescale Semiconductor, Inc. MPC962308 MOTOROLA NOTES 11 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS ...

Page 12

... Freescale Semiconductor, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...

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