mpc9350far2 Integrated Device Technology, mpc9350far2 Datasheet

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mpc9350far2

Manufacturer Part Number
mpc9350far2
Description
3.3v And 2.5v Pll Clock Generator
Manufacturer
Integrated Device Technology
Datasheet
IDT™ Low Voltage PLL Clock Driver
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
Low Voltage PLL Clock Driver
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2005. All rights reserved.
Low Voltage PLL Clock Driver
targeted for high performance clock distribution systems. With output
frequencies of up to 200 MHz and maximum output skews of 150 ps, the
MPC9350 is ideal for the most demanding clock tree designs. The device offers
9 low skew clock outputs, with each one configurable to support the clocking
needs of the various high-performance microprocessors, including the
PowerQUICC II integrated communication microprocessor. The extended
temperature range of the MPC9350 supports telecommunication and networking
requirements. The device employs a fully differential PLL design to minimize
cycle-to-cycle and long-term jitter.
Features
Functional Description
clock signal. The internal PLL allows the MPC9350 to operate in frequency locked condition and to multiply the input reference
clock. The reference clock frequency and the divider in the internal feedback path determine the VCO frequency. Two selectable
PLL feedback frequency ratios are available on the MPC9350 to provide input frequency range flexibility. The FBSEL pin selects
between divide-by-16 or divide-by-32 of the VCO frequency for PLL feedback. This feedback divider must be selected to match
the VCO frequency range. With the available feedback output dividers, the internal VCO of the MPC9350 is running at either 16x
or 32x of the reference clock frequency. The frequency of the QA, QB, QC and QD outputs is either one half, one fourth or one
eighth of the selected VCO frequency and can be configured for each output bank using the FSELA, FSELB, FSELC and FSELD
pins, respectively. The available output to input frequency ratios are 16:1, 8:1, 4:1 and 2:1. The REF_SEL pin selects the crystal
oscillator input or the LVCMOS compatible reference input (TCLK). TCLK also provides an external test clock in static test mode
when the PLL enable pin (PLL_EN) is pulled to logic low state. In test mode, the selected input reference clock is routed directly
to the output dividers without using the PLL. The test mode is intended for system diagnostics, test and debug purposes. This
test mode is fully static and the minimum clock frequency specification does not apply. The outputs can be disabled by
deasserting the OE pin (logic high state). In PLL mode, deasserting OE maintains PLL lock due to the internal feedback path.
The MPC9350 is fully 2.5 V and 3.3 V compatible and requires no external loop filter components. The on-chip crystal oscillator
requires no external components beyond a series resonant crystal. All inputs except the crystal oscillator interface accept
LVCMOS signals while the outputs provide LVCMOS compatible levels with the capability to drive terminated 50 Ω transmission
lines. For series terminated transmission lines, each of the MPC9350 outputs can drive one or two traces giving the device an
effective fanout of 1:18. The device is packaged in a 7x7 mm
The MPC9350 is a 2.5 V and 3.3 V compatible, PLL-based clock generator
The MPC9350 generates high frequency clock signals and provides nine exact frequency-multiplied copies of the reference
9 output LVCMOS PLL clock generator
25 – 200 MHz output frequency range
2.5 V and 3.3 V compatible
Compatible to various microprocessors such as PowerQuicc II
Supports networking, telecommunications and computer applications
Fully integrated PLL
Configurable outputs: divide-by-2, 4 and 8 of VCO frequency
Selectable output to input frequency ratio of 8:1, 4:1, 2:1 or 1:1
Oscillator or crystal reference inputs
Internal PLL feedback
Output disable
PLL enable/disable
Low skew characteristics: maximum 150 ps output-to-output
32-lead LQFP package
32-lead Pb-free Package Available
Temperature range –40°C to +85°C
2
32-lead LQFP package.
1
32-LEAD LQFP PACKAGE
32-LEAD LQFP PACKAGE
CLOCK GENERATOR
3.3 V AND 2.5 V PLL
Pb-FREE PACKAGE
LOW VOLTAGE
CASE 873A-03
CASE 873A-03
FA SUFFIX
AC SUFFIX
DATA SHEET
Rev 6, 4/2005
MPC9350
MPC9350
MPC9350

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mpc9350far2 Summary of contents

Page 1

... For series terminated transmission lines, each of the MPC9350 outputs can drive one or two traces giving the device an effective fanout of 1:18. The device is packaged in a 7x7 mm IDT™ Low Voltage PLL Clock Driver © Freescale Semiconductor, Inc., 2005. All rights reserved. Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc LOW VOLTAGE 3.3 V AND 2.5 V PLL CLOCK GENERATOR ...

Page 2

... FSELA (Pulldown) FSELB (Pulldown) FSELC (Pulldown) FSELD (Pulldown TCLK PLL_EN REF_SEL MPC9350 IDT™ Low Voltage PLL Clock Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc ÷ 2 PLL Ref 4 ÷ ÷ ÷ ...

Page 3

... Functional operation under absolute-maximum-rated conditions is not implied. IDT™ Low Voltage PLL Clock Driver Advanced Clock Drivers Devices Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Freescale Semiconductor Type Analog ...

Page 4

... I/O Phase Jitter (RMS) JIT(∅ characteristics apply for parallel output termination of 50Ω MPC9350 IDT™ Low Voltage PLL Clock Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc 4 = 3.3 V ± 5 -40° to 85°C) A Min Typ 2 ...

Page 5

... The MPC9350 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission line to a termination voltage of V output. IDT™ Low Voltage PLL Clock Driver Advanced Clock Drivers Devices Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Freescale Semiconductor = 2.5 V ± 5 -40° to 85°C) A ...

Page 6

... Output frequency relationship with respect to input reference frequency CLK. Consult the MPC9351 data sheet for more input to output relationships in external feedback mode. MPC9350 IDT™ Low Voltage PLL Clock Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc 6 APPLICATIONS INFORMATION configurations. The tables describe the outputs using the input clock frequency CLK as a reference ...

Page 7

... Figure 3. Power Supply Filter IDT™ Low Voltage PLL Clock Driver Advanced Clock Drivers Devices Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Freescale Semiconductor Although the MPC9350 has several design features to minimize the susceptibility to power supply noise (isolated ...

Page 8

... Figure 7. TCLK MPC9350 AC Test Reference for V MPC9350 IDT™ Low Voltage PLL Clock Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc 8 Since this step is well above the threshold region, it will not cause any false clock triggering; however, designers may be uncomfortable with unwanted reflections on the line ...

Page 9

... The variation in cycle time of a signal between adjacent cycles, over a random sample of adjacent cycle pairs. Figure 11. Cycle-to-Cycle Jitter IDT™ Low Voltage PLL Clock Driver Advanced Clock Drivers Devices Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Freescale Semiconductor V CC ÷ 2 ...

Page 10

... C A 28X SEATING PLANE C DETAIL AD 8X (θ1˚ (S) A1 (L1) DETAIL AD MPC9350 IDT™ Low Voltage PLL Clock Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc 10 PACKAGE DIMENSIONS 4X 0. DETAIL G E 32X ...

Page 11

... Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners ...

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