mpc93h51 Integrated Device Technology, mpc93h51 Datasheet
mpc93h51
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mpc93h51 Summary of contents
Page 1
... VCO frequency range. With available output dividers of divide-by-4 and divide-by-8, the internal VCO of the MPC93H51 is running at either the reference clock frequency. The frequency of the QA, QB, QC and QD outputs is either one half, one fourth or one eighth of the selected VCO frequency and can be configured for each output bank using the FSELA, FSELB, FSELC and FSELD pins, respectively ...
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... FSELC (pulldown) FSELD (pulldown) OE The MPC93H51 requires an external RC filter for the analog power supply pin V PLL_EN REF_SEL Figure 2. Pinout: 32-Lead LQFP Package Pinout (Top View) MPC93H51 IDT™ Low Voltage PLL Clock Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc ...
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... PLL enabled. The VCO output is routed to the output dividers Outputs disabled, PLL loop is open VCO is forced to its minimum frequency QA = VCO ÷ VCO ÷ VCO ÷ VCO ÷ 8 Max Unit Condition ±20 mA ±50 mA °C 150 MPC93H51 MPC93H51 3 ...
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... Functional operation is obtained when the crosspoint is within the V CMR and the input swing lies within the V 2. The MPC93H51 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission line to a termination voltage of V MPC93H51 IDT™ ...
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... Normal AC operation is obtained when the crosspoint is within the V CMR and the input swing lies within the V 4. The MPC93H51 will operate with input rise/fall times up to 3.0 ns, but the AC characteristics, specifically are within the specified range. ...
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... Freescale Semiconductor MC100EP111 or MC10EP222, taking advantage of its superior low-skew performance. Clock trees using LVPECL for clock distribution and the MPC93H51 as LVCMOS PLL fanout buffer with zero insertion delay will show significantly lower clock skew than clock distributions developed from CMOS fanout buffers ...
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... Advanced Clock Drivers Device Data Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Freescale Semiconductor the lowest VCO frequency (200 MHz for the MPC93H51). Applications using a higher VCO frequency exhibit less I/O jitter than the AC characteristic limit. The I/O jitter ...
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... Figure 7 illustrates an output driving a single series terminated line versus two series terminated lines in parallel. When taken to its extreme the fanout of the MPC93H51 clock driver is effectively doubled due to its capability to drive multiple lines. MPC93H51 IDT™ ...
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... TIME (nS) Figure 8. Single versus Dual Waveforms Pulse Generator Z = 50Ω Figure 10. TCLK MPC93H51 AC Test Reference for V Differential Pulse Generator Z = 50Ω IDT™ Low Voltage PLL Clock Driver Advanced Clock Drivers Device Data Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc ...
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... GND V V GND t SK(O) Figure 15. Output-to-Output Skew t SK( -1/f | JIT( Figure 17. Period Jitter 2.4 0. Figure 19. Transition Time Test Reference Advanced Clock Drivers Device Data Freescale Semiconductor NETCOM V CC ÷ GND ÷2 CC GND CC ÷ ÷2 CC MPC93H51 ...
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... EXACT SHAPE OF EACH CORNER IS OPTIONAL. 8. THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.1-mm AND 0.25-mm FROM THE LEAD TIP. MILLIMETERS DIM MIN MAX A 1.40 1.60 A1 0.05 0. 1.35 1.45 b 0.30 0.45 b1 0.30 0.40 c 0.09 0.20 c1 0.09 0.16 D 9.00 BSC D1 7.00 BSC e 0.80 BSC E 9.00 BSC E1 7.00 BSC L 0.50 0.70 L1 1.00 REF q 0˚ 7˚ REF R1 0.08 0.20 R2 0.08 --- S 0.20 REF MPC93H51 NETCOM MPC93H51 11 ...
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... MPC92459 MPC93H51 PART NUMBERS 900 MHz Low Voltage LVDS Clock Synthesizer Low Voltage PLL Clock Driver INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. ...