w83194br-372 Winbond Electronics Corp America, w83194br-372 Datasheet
w83194br-372
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w83194br-372 Summary of contents
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... W83194BR-372 WINBOND CLOCK GENERATOR FOR SIS 746/748 CHIPSETS Publication Release Date: April 13, 2005 - I - Revision 1.1 ...
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... Register 11: Spread Spectrum Programming (Default: 0Eh) ...........................................10 7.13 Register 12: Divisor and Step-less Enable Control (Default: 88h)....................................10 7.14 Register 13: FIX Mode Control (Default: 0Fh)...................................................................12 7.15 Register 14: Fix Mode Control (Default: 2Ch) ...................................................................12 7.16 Register 15: Skew Control (Default: E4h)..........................................................................13 8. ACCESS INTERFACE .............................................................................................................. 14 8.1 Block Write Protocol ...........................................................................................................14 8.2 Block Read Protocol...........................................................................................................14 W83194BR-372 - II - ...
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... AGP, ZCLK Electrical Characteristics................................................................................16 9.6 PCI Electrical Characteristics.............................................................................................16 9.7 24M, 48M Electrical Characteristics ..................................................................................17 9.8 REF Electrical Characteristics............................................................................................17 9.9 IOAPIC Electrical Characteristics ......................................................................................17 10. ORDERING INFORMATION..................................................................................................... 18 11. HOW TO READ THE TOP MARKING...................................................................................... 18 12. PACKAGE DRAWING AND DIMENSIONS.............................................................................. 19 13. REVISION HISTORY ................................................................................................................ 20 W83194BR-372 Publication Release Date: April 13, 2005 - III - Revision 1.1 ...
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... The W83194BR-372 provides I each clock outputs and provides -0.5% and +/-0.25% center type spread spectrum or programmable S.S.T. scale to reduce EMI. The W83194BR-372 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply. 2. PRODUCT FEATURES • 1 2.5V open drain Differential pairs clock outputs for CPU • ...
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... GND 24 PLL2 Divider XTAL OSC PLL1 Spread VCOCLK Spectrum M/N/Ratio ROM Divider Latch &POR Control Logic &Config Register I2C Interface - 2 - W83194BR-372 VDDI IOAPIC1 IOAPIC0 GND CPU_STOP#* CPUT1 VDDCPU GND CPUT0 CPUC0 VDDCPU GND VDDA SCLK* SDATA* PD#* GND AGP_0 AGP_1 VDDAGP VDD48 ...
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... PCI free running clock output. Latched input for FS3 at initial power up for H/W selecting the IN tp120k output frequency, This is internal 120K pull up. OUT Low skew (< 250ps) PCI clock outputs. OUT 2.5V IOAPIC outputs W83194BR-372 DESCRIPTION DESCRIPTION DESCRIPTION Publication Release Date: April 13, 2005 Revision 1.1 ...
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... PWR 3.3V power supply for PCI. PWR 3.3V power supply for AGP. PWR 2.5V power supply for CPU. PWR 3.3V power supply for 48MHz. PWR 3.3V power supply for ZCLK. PWR 2.5V power supply for IOAPIC PWR 3.3V power supply for Analog core logic. PWR Ground pin - 4 - W83194BR-372 ...
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... Publication Release Date: April 13, 2005 - 5 - W83194BR-372 AGP (MHZ) PCI (MHZ) 66.67 33.33 50.00 33.33 66.67 33.33 50.00 33.33 66.67 33.33 50.00 33.33 66.67 33.33 55.56 33.33 66.67 33.33 50.00 33.33 66.67 33.33 50.00 33.33 66.67 33.33 66.67 33.33 66.58 33.29 55.48 33.29 63.64 31.82 66 ...
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... Frequency selection by software via I Enable software table selection FS [4:0 Hardware table setting (Jump mode Software table setting through Bit7~3. (Jump less mode) Enable spread spectrum mode under clock output Spread Spectrum mode disable 1 = Spread Spectrum mode enable Reserved DESCRIPTION DESCRIPTION - 6 - W83194BR-372 2 C ...
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... Reserved 4 Reserved 0 3 Reserved 1 2 Reserved 0 Reserved 1 Reserved 0 0 Reserved 0 DESCRIPTION DESCRIPTION 001: 132 / 66 / 33M 010:132 / 75.43 / 37.7M 011: 132 / 88 / 44M 100:176 / 88 / 44M 101: 132 / 66 / 33M 110:132 / 75.43 / 33M 111: 132 / 88 / 33M 000: Clock from PLL1 DESCRIPTION Publication Release Date: April 13, 2005 - 7 - W83194BR-372 Revision 1.1 ...
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... N<3> N<2> N<1> N<0> 1 7.9 Register 8: Winbond Chip ID (Default: 72h) (Read only) BIT NAME PWD 7 CHPI_ID [7] 0 Winbond Chip ID. W83194BR-372 (SA5872). 6 CHPI_ID [6] 1 Winbond Chip ID. 5 CHPI_ID [5] 1 Winbond Chip ID. 4 CHPI_ID [4] 1 Winbond Chip ID. 3 CHPI_ID [3] 0 Winbond Chip ID. 2 CHPI_ID [2] 0 Winbond Chip ID ...
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... VCO =14.318MHz*(N+4)/ M. Once the watchdog timer timeout, the bit will be clear. Then the frequency will be decided by hardware default FS<4:0> or desired frequency select SAF_FREQ [4:0] depend on EN_SAFE_FREQ (Reg0 - bit 0). Programmable N divisor bit 9. Reserved Charge pump current selection Reserved - 9 - W83194BR-372 Publication Release Date: April 13, 2005 Revision 1.1 ...
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... DS2 0 1 DS1 0 0 DS0 0 DESCRIPTION Spread Spectrum Up Counter bit 3 ~ bit 0. Spread Spectrum Down Counter bit 3 ~ bit 0 2’s complement representation. Ex: 1 -> 1111; 2 -> 1110; 7 -> 1001; 8 -> 1000 DESCRIPTION Reserved Reserved Defined the CPU, ZCLK, AGP, PCI divider ratio - 10 - W83194BR-372 ...
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... Publication Release Date: April 13, 2005 - 11 - W83194BR-372 AGP Ratio PCI Ratio ...
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... Reserved 1 Reserved 4 SPSP1 0 Spread Spectrum type select. 3 SPSP0 1 2 ASKEW [2] 1 CPU to AGP skew control, Skew resolution is 340ps Expand the skew direction is same as 1 ASKEW [1] 0 CPU_AGP_SKEW [2:0] setting 0 ASKEW [0] 0 DESCRIPTION DESCRIPTION 00 : Down Down 0. Center +/- 0. Center +/- 0.25 W83194BR-372 ...
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... Stop CPU0 clocks, 1: Enable stop feature, 0: Disable Reserved CPU to ZCLK skew control, Skew resolution is 340ps Expand the skew direction is same as CPU_ZCLK_SKEW [2:0] setting CPU to PCI skew control, Skew resolution is 340ps Expand the skew direction is same as CPU_PCI_SKEW [2:0] setting - 13 - W83194BR-372 Publication Release Date: April 13, 2005 Revision 1.1 ...
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... ACCESS INTERFACE The W83194BR-372 provides I W83194BR-372 is provided Block Read/Block Write and Byte-Data Read/Write protocol. The I address is defined at 0xD2. Block Read and Block Write Protocol 8.1 Block Write Protocol 8.2 Block Read Protocol ## In block mode, the command code must filled 8’h00 8.3 Byte Write Protocol 8 ...
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... W83194BR-372 RATING -0.5V to +4. 4.6 V 3.135V to 3.465V 3.135V to 3.465V - 65° 150°C - 55° 125°C 0° 70°C 2000V TEST CONDITIONS All outputs using 3.3V power All outputs using 3.3V power CPU = 100 to 200 MHz PCI = 33.3 Mhz with load TEST CONDITIONS Measured at 1 ...
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... Vout=1.95V 38 mA Vout=0.4V ° C, Test load, Cl=10pF, MIN. MAX. UNITS 500 2000 ps Measure from 0.4V to 2.4V 500 2000 ps Measure from 2.4V to 0.4V 250 ps Measure 1.5V point -33 mA Vout=1.0V -33 mA Vout=3.135V 30 mA Vout=1.95V 38 mA Vout=0. W83194BR-372 TEST CONDITIONS TEST CONDITIONS TEST CONDITIONS ...
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... W83194BR-372 TEST CONDITIONS Measure from 0.4V to 2.4V Measure from 2.4V to 0.4V Measure 1.5V point Vout=1.0V Vout=3.135V Vout=1.95V Vout=0.4V TEST CONDITIONS Measure from 0.4V to 2.4V Measure from 2.4V to 0.4V Measure 1.5V point Vout=1.0V Vout=3.135V Vout=1.95V Vout=0.4V TEST CONDITIONS Measure from 0.4V to 2.0V Measure from 2 ...
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... PART NUMBER W83194BR-372 11. HOW TO READ THE TOP MARKING W83194BR-372 28051234 342GBASA 1st line: Winbond logo and the type number: W83194BR-372 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 342 G 342: packages made in '2003, week 42 G: assembly house ID ...
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... PACKAGE DRAWING AND DIMENSIONS W83194BR-372 Publication Release Date: April 13, 2005 - 19 - Revision 1.1 ...
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... All of the versions before 0.50 are for internal use. n.a. First published preliminary version 10, 11, Modify some description, red text. 12, 16, 17 Correction IC version, correction some 18 description and default value 5, 11 Change frequency table ‘01101’ Update on Web 20 Add disclaimer Important Notice - 20 - W83194BR-372 DESCRIPTION ...