w83194br-sd Winbond Electronics Corp America, w83194br-sd Datasheet - Page 19

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w83194br-sd

Manufacturer Part Number
w83194br-sd
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.20 Register 19: Control (Default = 0AH)
7.21 Register 20: Winbond Chip ID – Project Code (Ready Only) (Default = 47H)
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
CPUSTOP_EN
PCISTOP_EN
INV_DOT48
INV_USB48
CHPI_ID [7]
CHPI_ID [6]
CHPI_ID [5]
CHPI_ID [4]
CHPI_ID [3]
CHPI_ID [2]
CHPI_ID [1]
CHPI_ID [0]
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
USB48_S2
USB48_S1
SRCS_EN
INV_SRC
NAME
NAME
PWD
PWD
0
1
0
0
0
1
1
1
0
0
0
0
1
0
1
0
Winbond Chip ID. W83194BR-SD (SA5847).
Winbond Chip ID.
Winbond Chip ID.
Winbond Chip ID.
Winbond Chip ID.
Winbond Chip ID.
Winbond Chip ID.
Winbond Chip ID.
Stop all CPU clocks. 1: Enable stop feature, 0: Disable
Stop SRC clock and all PCI clocks except free running parts.
1: Enable stop feature, 0: Disable
Allow PCISTOP pin to affect SRC output state
1: Allow, 0: Ignore the PCISTOP pin effect (Free running)
Invert the DOT48 phase
0: In phase with USB48, 1: 180 degrees out of phase
Invert the USB48 phase
0: In phase with DOT48, 1: 180 degrees out of phase
USB48/DOT48/USB24_48 slew rate control
11: Strong, 00: Weak, 10/01: Normal
Invert the SRC phase, 0: Default, 1: Inverse
W83194BR-SD/W83194BG-SD
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DESCRIPTION
DESCRIPTION
Publication Release Date: March, 22, 2006
Revision 1.2

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