w83196s-14 Winbond Electronics Corp America, w83196s-14 Datasheet

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w83196s-14

Manufacturer Part Number
w83196s-14
Description
100 Mhz Clock For Bx Chipset 2 Chip
Manufacturer
Winbond Electronics Corp America
Datasheet

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Part Number
Manufacturer
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Part Number:
W83196S-14
Manufacturer:
Winbond
Quantity:
940
Part Number:
w83196s-14A
Quantity:
4 000
1. GENERAL DESCRIPTION
The W83196S-14 is a Clock Synthesizer which provides all clocks required for high-speed RISC or
CISC microprocessor. Twelve different frequency of CPU, and PCI clocks are externally selectable
with smooth transitions.
The W83196S-14 provides I2C serial bus interface to program the registers to enable or disable each
clock outputs and choose the 0.5% center type spread spectrum to reduce EMI.
The W83196S-14 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI CLOCK outputs typically provide greater than 1V/nS slew rate into 30 pF loads. CPU
CLOCK outputs typically provide better than 1V/nS slew rate into 20 pF loads as maintaining 50 5%
duty cycle. The fixed frequency outputs as REF, 24 MHz, and 48 MHz provide better than 0.5V/nS
slew rate.
2. FEATURES
Supports Pentium
12 sets of CPU frequencies selection
2 CPU clocks (one free running CPU clock)
7 PCI synchronous clocks(one free running PCI clock)
Optional single or mixed supply:
(V
(V
Skew form CPU to PCI clock 1.5 to 4.0 nS, CPU leads.
CPU clock jitter less than 200 pS
PCI_F, PCI1: 6 clock skew less than 500 pS
Smooth frequency switch with selections from 66.8 MHz to 150 MHz CPU
I
Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
MODE pin for power management
48 MHz for USB
24 MHz for super I/O
Packaged in 28-pin SOP
2
0.5% center type spread spectrum function to reduce EMI
C 2-Wire serial interface and I
DD
DD
R = V
A = V
DD
DD
Core = V
C = 2.5V 5%)
100 MHZ CLOCK FOR BX CHIPSET (2 CHIP)
II CPUs with I
DD
P = V
DD
2
C read back
4 = 3.3V 5%)
2
C
- 1 -
Preliminary W83196S-14
Publication Release Date: March 1999
Revision A1

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w83196s-14 Summary of contents

Page 1

... The W83196S-14 provides I2C serial bus interface to program the registers to enable or disable each clock outputs and choose the 0.5% center type spread spectrum to reduce EMI. The W83196S-14 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply. High drive PCI CLOCK outputs typically provide greater than 1V/nS slew rate into 30 pF loads. CPU CLOCK outputs typically provide better than 1V/nS slew rate into 20 pF loads as maintaining 50 5% duty cycle ...

Page 2

... X2 SEL100/66# SEL48* MODE* CPU_STOP# PCI_STOP# SDATA* SCLK* 4. PIN CONFIGURATION PCICLK_F PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCI_STOP#/PCICLK5 CPU_STOP#/PCICLK6 48MHz/Mode* 24/48MHz Preliminary W83196S-14 VDDR XTAL OSC VDDA VDDC PLL1 Spread STOP Spectrum ¡Ò 2/3/4 VDDC VDDP Latch PCI STOP clock Divder Contro ...

Page 3

... CPU_STOP# 5.3 I2C Control Interface SYMBOL PIN SDATA* 18 SDCLK* 17 Preliminary W83196S-14 I/O IN Crystal input with internal loading capacitors and feedback resistors. OUT Crystal output at 14.318 MHz nominally. I/O OUT Low skew (<250 pS) clock outputs for host frequencies such as CPU, Chipset and Cache. V voltage for these outputs. ...

Page 4

... VssC, VssR, Vss4, 3, 15, 19, VssP 28 6. FREQUENCY SELECTION SEL100/66 Preliminary W83196S-14 I/O IN CPU clock frequency select pin. O Provides 14.318 fixed frequency. I/O Internal 250k pull-up. Latched input for SEL48* at initial power up. SEL48 pin14 is 24 MHz SEL48 pin14 is 48 MHz Reference clock during normal operation. ...

Page 5

... MODE = 1, these functions are not available. A particular clock could be enabled as both the 2- wire serial control interface and one of these pins indicate that it should be enabled. The W83196S-14 may be disabled in the low state according to the following table in order to reduce power consumption. All clocks are stopped in the low state, but maintain a valid high period on transitions from running to stop ...

Page 6

... Preliminary W83196S-14 Byte 1 Byte 0 Ack DESCRIPTION - Reserved - SSEL2 ( Frequency table selection by software via I - SSEL1 ( Frequency table selection by software via I - SSEL0 ( Frequency table selection by software via Selection by SEL100/66 Selection by software I - Reserved - Bit1 ...

Page 7

... Register 5: PCI Clock Register (1 = Enable Stopped) BIT @POWERUP Preliminary W83196S- (When Register 7 Bit CPU, SDRAM (MHZ) 124 150 140 133 OUTPUTS PCI REF2X Hi-Z Hi-Z See table 14.318 PIN - Reserved 14 24/48 MHz (Active/Inactive) - ...

Page 8

... Register 7: Additional Register BIT @POWERUP PIN Preliminary W83196S-14 - Reserved - Reserved 24 IOAPIC (Active/Inactive) - Reserved - Reserved - Reserved 27 Bit1 Bit0 REF2X 1 1 Drive strength Drive strength Drive strength Tri-state ...

Page 9

... Skew (CPU-CPU), (PCI- PCI) Cycle to Cycle Jitter CPU Absolute Jitter Jitter Spectrum 20 dB Bandwidth from Center Output Rise (0.4V ~ 2.0V) & Fall (2.0V ~0.4V) Time Overshoot/Undershoot Beyond Power Rails Ring Back Exclusion Preliminary W83196S-14 SYMBOL 2. + SYM. MIN. TYP. ...

Page 10

... Pull-up Current Min Pull-up Current Max Pull-down Current Min Pull-down Current Max Rise/Fall Time Min Between 0.4V and 2.0V Rise/Fall Time Max Between 0.4V and 2.0V Preliminary W83196S SYM. MIN. TYP. MAX -25 IL ...

Page 11

... Between 0.8V and 2.0V 8.4.4 Type 5 Buffer for PCICLK (1:6,F) PARAMETER Pull-up Current Min. I Pull-up Current Max. I Pull-down Current Min. Pull-down Current Max. I Rise/Fall Time Min. T Between 0.8V and 2.0V Rise/Fall Time Max. T Between 0.8V and 2.0V Preliminary W83196S-14 SYM. MIN. TYP. MAX. (min) OH (max) -29 OH (min) OL (max (min) ...

Page 12

... If optional EMI reducing capacitor are needed, they should be placed as close to the series terminating resistor as possible and after the series terminating resistor. These capacitor has typical values ranging from 4 pF. Preliminary W83196S-14 reaches 2.5V, the logic level that is present on these pins are DD 2 ...

Page 13

... Terminating 10 KW Resistor Device Pin 10 KW Ground Programming Header VDD Pad Ground Pad Series 10K Terminating Resistor Device Pin - 13 - Preliminary W83196S-14 Clock Trace EMI Reducing Cap Optional Ground Clock Trace EMI Reducing Cap Optional Ground Publication Release Date: March 1999 Revision A1 ...

Page 14

... W83196S-14 11. HOW TO READ THE TOP MARKING W83196S-14 28051234 814GBB 1st line: Winbond logo and the type number: W83196S-14 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 814 814: packages made in '98, week 14 G: assembly house ID ...

Page 15

... Winbond customers using or selling these products for use in such applications their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sale. Preliminary W83196S-14 Winbond Electronics (H.K.) Ltd. Winbond Electronics North America Corp. ...

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