max97001 Maxim Integrated Products, Inc., max97001 Datasheet
max97001
Related parts for max97001
max97001 Summary of contents
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... This allows high gain for low-level sig- nals without compromising the quality of large signals. All control is performed using the 2-wire I The MAX97001 operates over the extended -40NC to +85NC temperature range, and is available in the 2mm x 2.5mm, 20-bump, WLP package (0.5mm pitch). ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers General Description . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers Table of ConTenTs (ConTinued) Table 6. Power Management Register . . . . . . . . . . . . . . . . . . . ...
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... PGAINA INADIFF LPMODE HPLVOL: -64dB TO +6dB PGAINA HPLMIX HPRVOL: -64dB TO +6dB PGAINB HPRMIX INBDIFF SPKVOL: -30dB TO +20dB PGAINB SPKMIX ANALOG SWITCHES BYPEN MAX97001 D3 GND 0.1µF 10µF B1 BIAS BIAS 1µF HPVDD A2 HPL CLASS H 0/3dB HPLEN HPVSS HPVDD A1 HPR CLASS H 0/3dB HPREN ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers ABSOLUTE MAxIMUM RATINGS (Voltages with respect to GND HPVDD ........................................................-0.3V to +2.2V DD PVDD ....................................................................-0.3V to +6.0V HPVSS ..................................................................-2.2V to +0.3V C1N ..................................... (HPVSS - 0.3V) ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued 1.8V 3.7V 0V. Input signal applied at INA configured single-ended, preamp gain = 0dB, HPLVOL = DD PVDD GND ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued 1.8V 3.7V 0V. Input signal applied at INA configured single-ended, preamp gain = 0dB, HPLVOL = DD PVDD GND ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued 1.8V 3.7V 0V. Input signal applied at INA configured single-ended, preamp gain = 0dB, HPLVOL = DD PVDD GND ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued 1.8V 3.7V 0V. Input signal applied at INA configured single-ended, preamp gain = 0dB, HPLVOL = DD PVDD GND ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers TIMING CHARACTERISTICS (V = 3.7V 0V PVDD GND A MIN PARAMETER SYMBOL Serial-Clock Frequency Bus Free Time Between STOP and ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers ( 3.7V LDOIN PVDD GND PGND loads (Z ) connected between OUTP and OUTN. Headphone loads (R SPK ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers ( 3.7V LDOIN PVDD GND PGND loads (Z ) connected between OUTP and OUTN. Headphone loads (R SPK ...
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... SPK IN-BAND OUTPUT SPECTRUM 0 SSM f = 1kHz IN -20 -40 -60 -80 -100 -120 5.0 5 FREQUENCY (kHz) WIDEBAND OUTPUT SPECTRUM RBW = 100Hz FFM 0 100 1000 FREQUENCY (MHz) SOFTWARE SHUTDOWN RESPONSE MAX97001 toc25 SDA 2V/div SPKR OUTPUT 200mA/div 1ms/div 0dB. Speaker = ∞ ∞ ...
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... V = 3.7V LDOIN PVDD GND PGND loads (Z ) connected between OUTP and OUTN. Headphone loads (R SPK C1P-C1N HPVDD HPVSS BIAS SOFTWARE TURN-ON RESPONSE MAX97001 toc26 SDA 2V/div SPKR OUTPUT 200mA/div 2ms/div THD+N vs. OUTPUT POWER 32I LOAD 6kHz IN 0.1 0. 100Hz ...
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... FREQUENCY (kHz) CROSSTALK vs. FREQUENCY 32I LOAD RIGHT TO LEFT LEFT TO RIGHT 0.01 0 100 FREQUENCY (kHz) SOFTWARE SHUTDOWN RESPONSE MAX97001 toc39 SDA 2V/div HPL/HPR 200mV/div 1ms/div 0dB. Speaker = ∞ ∞ ...
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... PVDD = 2.5V 3.0 PVDD = 2.7V 2.5 PVDD = 3.0V 2.0 PVDD = 3.7V 1.5 1.0 PVDD = 5.0V PVDD = 5.5V 0 (V) COM HPLVOL = HPRVOL = SPKVOL = = ∞, R SPK CLASS H OPERATION MAX97001 toc41 HPVDD 1V/div HPL/HPR 200mV/div HPVSS 1V/div 10ms/div BYPASS SWITCH OFF-ISOLATION 0 -20 -40 -60 -80 -100 -120 5 6 0.01 0.1 1 FREQUENCY (kHz) 0dB. Speaker = ∞ ...
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... D2 INB2 Input B2. Right input or positive input. D3 GND Analog Ground D4 PVDD Class D Power Supply. Bypass with a 1FF capacitor to GND. D5 OUTN Negative Speaker Output MAX97001 HPR HPL HPVSS C1P C1N BIAS SDA SCL V HPVDD DD INA1 INA2 COM1 COM2 OUTP INB1 INB2 ...
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... If one of the inputs is not selected by either mixer automatically powered down to save power. The MAX97001 Class D speaker amplifier utilizes active emissions limiting and spread-spectrum modulation to Signal Path minimize the EMI radiated by the amplifier. ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers STEREO SINGLE-ENDED IN_2 (R) IN_1 (L) DIFFERENTIAL IN_2 (+) IN_1 (-) Figure 3. Differential and Stereo Single-Ended Input Configurations R TO MIXER L TO MIXER 19 ...
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... The MAX97001’s spread- spectrum modulator randomly varies the switching frequency by Q20kHz around the center frequency (250kHz). Above 10MHz, the wideband spectrum looks modulation like noise for EMI purposes (see Figure 4) ...
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... This allows the headphone outputs of the MAX97001 to be biased at GND while operating from a single supply (Figure 6). Without a DC component, there is no need for the large DC-blocking capacitors. Instead of two large (220FF, ...
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... The address is defined as the 7 most signifi- cant bits (MSBs) followed by the read/write bit. Set the read/ write bit configure the MAX97001 to read mode. Set the read/write bit configure the MAX97001 to write mode. The address is the first byte of information sent to the MAX97001 after the START (S) condition ...
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... Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers Nine internal registers program the MAX97001. Table 1 lists all of the registers, their addresses, and power-on- reset states. Register 0xFF indicates the device revision. Table 1. Register Map REGISTER B7 B6 STATUS Input Gain ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers Table 2. Input Register REGISTER BIT NAME 7 INADIFF 6 INBDIFF 5 4 PGAINA 0x00 PGAINB 0 24 DESCRIPTION Input A Differential Mode. Configures the ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers Table 3. Mixer Registers REGISTER BIT NAME 7 6 HPLMIX 5 4 0x01 3 2 HPRMIX 0x02 SPKMIX 1 0 DESCRIPTION Left Headphone Mixer. ...
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... Volume Slewing. Determines whether volume slewing is used on all volume control changes to reduce clicks and pops. When enabled, volume changes cause the MAX97001 to ramp through intermediate volume settings whenever a change to the volume is made. If ZCD = 1, slewing occurs at a rate of 0.2ms per step. If ZCD = 0, slew time depends on the input signal ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers Table 4. Volume Control Registers (continued) REGISTER BIT NAME 7 HPGAIN 5 HPRM 4 3 0x04 2 HPRVOL 1 0 DESCRIPTION Headphone Gain. Controls the headphone amplifier gain. ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers Table 4. Volume Control Registers (continued) REGISTER BIT NAME 7 FFM 6 SPKM 5 4 0x05 3 SPKVOL DESCRIPTION Fixed-Frequency Oscillation. Removes spread spectrum ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers Table 5. Distortion Limiter Register REGISTER BIT NAME Distortion Limit 7 6 THDCLP 5 0x07 4 Distortion Release Time Constant 0 THDT1 2.8s ...
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... Each transmit sequence is framed by a START or REPEATED START (Sr) condi- tion and a STOP (P) condition. Each word transmitted to the MAX97001 is 8 bits long and is followed by an acknowledge clock pulse. A master reading data from the MAX97001 transmits the proper slave address fol- lowed by a series of nine SCL pulses ...
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... Slave Address address pointer, one or more bytes of data, and a STOP condition. Figure 10 illustrates the proper frame format for writing one byte of data to the MAX97001. Figure 11 illustrates the frame format for writing n-bytes of data to the MAX97001. The slave address with the R/W bit set to 0 indicates that the master intends to write data to the MAX97001 ...
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... SDA low during the 9th SCL clock pulse. A START command followed by a read command resets the address pointer to register 0x00. The first byte transmitted from the MAX97001 is the con- tents of register 0x00. Transmitted data is valid on the rising edge of SCL. The address pointer autoincrements after each read data byte ...
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... Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers ACKNOWLEDGE FROM MAX97001 ACKNOWLEDGE FROM MAX97001 S SLAVE ADDRESS 0 R/W Figure 12. Reading One Byte of Data from the MAX97001 ACKNOWLEDGE FROM MAX97001 ACKNOWLEDGE FROM MAX97001 S SLAVE ADDRESS 0 REGISTER ADDRESS R/W Figure 13. Reading n-Bytes of Data from the MAX97001 ...
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... Depending on the manufacturer, 10pF to 20pF capacitors typically exhibit self resonance at RF frequencies. These capacitors when placed at the input pins can effectively shunt the RF noise at the inputs of the MAX97001. For these capacitors to be effective, they must have a low- impedance, low-inductance path to the ground plane. ...
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... PCB to minimize the loop area thereby reducing the inductance of the circuit. If filter components are used on the speaker outputs, be sure to locate them as close as possible to the MAX97001 to ensure maximum effectiveness. Minimize the trace length from any ground tied passive components to GND to further minimize radiated EMI ...
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Audio Subsystem with Mono Class D Speaker and Class H Headphone Amplifiers For the latest package outline information and land patterns www.maxim-ic.com/packages. package code indicates RoHS status only. Package drawings may show a different suffix character, but the ...
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... Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2010 Maxim Integrated Products © DESCRIPTION Maxim is a registered trademark of Maxim Integrated Products, Inc. Revision History PAGES CHANGED — ...