nb7vq1006m ON Semiconductor, nb7vq1006m Datasheet

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nb7vq1006m

Manufacturer Part Number
nb7vq1006m
Description
1.8v / 2.5v 10gbps Equalizer Receiver With 1 6 Differential Cml Outputs
Manufacturer
ON Semiconductor
Datasheet

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NB7VQ1006M
1.8V / 2.5V 10Gbps
Equalizer Receiver with 1:6
Differential CML Outputs
Multi-Level Inputs w/ Internal Termination
Description
(signal enhancer) that operates up to 10 Gbps/7.5 GHz with a 1.8 V or
2.5 V power supply. When placed in series with a Data/Clock path, it
will enhance the degraded signal transmitted across a FR4 backplane
or cable interconnect and output six identical CML copies of the input
signal.
flow through or bypass the EQualizer section. Control of the
EQualizer function is realized by setting EQEN; When EQEN is set
Low, the IN / IN inputs bypass the Equalizer. When EQEN is set High,
the IN / IN inputs flow through the EQualizer. The default state at
start-up is LOW.
50 W Termination resistors, in a 100 W center-tapped configuration,
via the VT Pin and will accept differential LVPECL, CML or LVDS
logic levels. This feature provides transmission line termination
on-chip, at the receiver end, eliminating external components.
of high performance Data/Clock products.
Features
*For additional information on our Pb-Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2008
February, 2008 - Rev. 1
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The NB7VQ1006M is a high performance EQualizer Receiver
The EQualizer ENable pin (EQEN) allows the IN/IN inputs to either
The differential Data/Clock inputs incorporate a pair of internal
The NB7VQ1006M is a member of the PEEQ GigaComm™ family
Maximum Input Data Rate > 10 Gbps
Maximum Input Clock Frequency > 7.5 GHz
Backplane and Cable Interconnect Compensation
225 ps Typical Propagation Delay
30 ps Typical Rise and Fall Times
Differential CML Outputs, 400 mV Peak-to-Peak, Typical
Operating Range: V
Internal Input Termination Resistors, 50 W
QFN-24 Package, 4 mm x 4 mm
-40°C to +85°C Ambient Operating Temperature
These are Pb-Free Devices*
CC
= 1.71 V to 2.625 V, GND = 0 V
1
*For additional marking information, refer to
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Application Note AND8002/D.
A
L
Y
W
G
(Note: Microdot may be in either location)
SIMPLIFIED BLOCK DIAGRAM
ORDERING INFORMATION
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
http://onsemi.com
MN SUFFIX
CASE 485L
QFN-24
EQ
Publication Order Number:
1
NB7VQ1006M/D
DIAGRAM*
24
MARKING
Q1006M
ALYWG
NB7V
G

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nb7vq1006m Summary of contents

Page 1

... W Termination resistors 100 W center-tapped configuration, via the VT Pin and will accept differential LVPECL, CML or LVDS logic levels. This feature provides transmission line termination on-chip, at the receiver end, eliminating external components. The NB7VQ1006M is a member of the PEEQ GigaComm™ family of high performance Data/Clock products. Features • ...

Page 2

... EQEN (Equalizer Enable Figure 1. Table 1. EQUALIZER ENABLE FUNCTION EQEN VCC EQEN VCC NB7VQ1006M Detailed Block Diagram of NB7VQ1006M 0 IN/IN Inputs Bypass the EQualizer Section 1 Inputs Flow through the EQualizer NB7VQ1006M ...

Page 3

... In the differential configuration when the input termination pin (VT) is connected to a common termination voltage or left open, and if no signal is applied on IN/IN, then the device will be susceptible to self-oscillation. Qn/Qn outputs have internal 50 W source. 2. All VCC, VCCO and GND pins must be externally connected to the same power supply voltage to guarantee proper device operation. NB7VQ1006M Description http://onsemi.com ...

Page 4

... Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 4. JEDEC standard multilayer board - 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad. NB7VQ1006M Characteristics Human Body Model Machine Model ...

Page 5

... CML outputs loaded with for proper operation Input and output parameters vary 1:1 with and V parameters must be complied with simultaneously. IHD ILD, ID CMR NB7VQ1006M 1. 2.625 V; GND = CCO Min ...

Page 6

... Q Output Amplitude (mV) V 350 300 250 CLOCK OUTPUT FREQUENCY (GHz) out Figure 3. Output Voltage Amplitude (V Frequency ( Ambient Temperature (Typ), EQEN = NB7VQ1006M = 2.625 V; GND = CCO Characteristic 5.0 GHz 2. 7.5 GHz ...

Page 7

... V IHD IN V ILD Figure 5. Differential Inputs Driven Differentially CM(MAX CM(MIN) GND Q DUT Driver Device Q Figure 8. Typical Termination for CML Output Driver and Device Evaluation NB7VQ1006M PLH Figure 6. AC Reference Measurement V IHD(MAX) V ILD(MAX IHD(TYP CMR ID IHD ...

Page 8

... Termination Driver Q Q DJ1 Figure 11. Typical NB7VQ1006 Equalizer Application and Interconnect with PRBS23 pattern at 6.5 Gbps NB7VQ1006M V CCO (Receiver Figure 10. Alternative Output Termination APPLICATION INFORMATION FR4 - 12 Inch Backplane IN IN http://onsemi.com 100 GND NB7VQ1006M EQualizer DJ2 DJ3 ...

Page 9

... Tape and Reel Packaging Specifications Brochure, BRD8011/D. NB7VQ1006M NB7VQ1006M LVDS Driver GND GND NB7VQ1006M Differential CC Driver GND GND (VT Connected to External V *V REFAC Package QFN-24 (Pb-Free) QFN-24 (Pb-Free) QFN-24 (Pb-Free) http://onsemi ...

Page 10

... FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.80 1.00 A1 0.00 0.05 A2 0.60 0.80 A3 0.20 REF b 0.23 0.28 D 4.00 BSC D2 2.70 2.90 E 4.00 BSC E2 2.70 2.90 e 0.50 BSC L 0.35 0.45 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NB7VQ1006M/D ...

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