nb7hq14m ON Semiconductor, nb7hq14m Datasheet

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nb7hq14m

Manufacturer Part Number
nb7hq14m
Description
2.5v 7ghz / 10gbps Differential Input To 1.8v / 2.5v 1 4 Cml Clock / Data Fanout Buffer W/ Selectable Input Equalizer
Manufacturer
ON Semiconductor
Datasheet
NB7HQ14M
2.5V 7GHz / 10Gbps
Differential Input to 1.8V /
2.5V 1:4 CML Clock / Data
Fanout Buffer
Input Equalizer
Multi−Level Inputs w/ Internal Termination
Description
buffer with a selectable Equalizer receiver. When placed in series with
a Clock /Data path operating up to 7 GHz or 10 Gb/s, respectively, the
NB7HQ14M inputs will compensate the degraded signal transmitted
across a FR4 PCB backplane or cable interconnect and output four
identical CML copies of the input signal. Therefore, the serial data rate
is increased by reducing Inter−Symbol Interference (ISI) caused by
losses in copper interconnect or long cables. The EQualizer ENable
pin (EQEN) allows the IN/IN inputs to either flow through or bypass
the Equalizer section. Control of the Equalizer function is realized by
setting EQEN; When EQEN is set Low, the IN/IN inputs bypass the
Equalizer. When EQEN is set High, the IN/IN inputs flow through the
Equalizer. The default state at start−up is LOW. As such, NB7HQ14M
is ideal for SONET, GigE, Fiber Channel, Backplane and other
Clock/Data distribution applications.
resistors that are accessed through the VT pin. This feature allows the
NB7HQ14M to accept various logic level standards, such as LVPECL,
CML or LVDS. The outputs have the flexibility of being powered by
either a 2.5 V or 1.8 V supply. The 1:4 fanout design was optimized
for low output skew applications.
performance clock products.
Features
© Semiconductor Components Industries, LLC, 2009
May, 2009 − Rev. 0
The NB7HQ14M is a high performance differential 1:4 CML fanout
The differential inputs incorporate internal 50 W termination
The NB7HQ14M is a member of the GigaComm™ family of high
2.625 V
Input Data Rate > 10 Gb/s
Input Clock Frequency > 7 GHz
150 ps Typical Propagation Delay
35 ps Typical Rise and Fall Times
< 15 ps Maximum Output Skew
< 0.8 ps Maximum RMS Clock Jitter
< 10 ps pp of Data Dependent Jitter
Differential CML Outputs, 400 mV Peak−to−Peak, Typical
Selectable Input Equalization
Operating Range: V
−40°C to +85°C Ambient Operating Temperature
These are Pb−Free Devices
Internal Input Termination Resistors, 50 W
CC
= 2.375 V to 2.625 V, V
w/ Selectable
CCO
= 1.71 V to
1
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
*For additional marking information, refer to
MN SUFFIX
CASE 485G
(Note: Microdot may be in either location)
Application Note AND8002/D.
QFN−16
SIMPLIFIED BLOCK DIAGRAM
1
ORDERING INFORMATION
A
L
Y
W
G
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
EQ
Publication Order Number:
1
16
DIAGRAM*
MARKING
ALYWG
Q14M
NB7H
G
NB7HQ14M/D

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nb7hq14m Summary of contents

Page 1

... NB7HQ14M to accept various logic level standards, such as LVPECL, CML or LVDS. The outputs have the flexibility of being powered by either a 2 1.8 V supply. The 1:4 fanout design was optimized for low output skew applications. The NB7HQ14M is a member of the GigaComm™ family of high performance clock products. Features • ...

Page 2

... Multi−Level Inputs LVPECL, LVDS, CML VREFAC V CC GND EQEN (Equalizer Enable Figure 1. 0 2:1 MUX EQ 1 Detailed Block Diagram of NB7HQ14M http://onsemi.com 2 CML Outputs V CC0 ...

Page 3

... GND NB7HQ14M VREFAC EQEN CCO Figure 2. QFN−16 Pinout (Top View) Table 2. PIN DESCRIPTION Pin Name I LVPECL, CML, LVDS Input VREFAC 4 IN LVPECL, CML, LVDS Input 5 EQEN LVCMOS Input ...

Page 4

Table 3. ATTRIBUTES ESD Protection R − EQEN Input Pulldown Resistor PD Moisture Sensitivity (Note 3) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 3. For additional information, see Application Note AND8003/D. Table 4. MAXIMUM ...

Page 5

Table 5. DC CHARACTERISTICS, MULTI−LEVEL INPUTS T = −40°C to 85°C (Note 5) A Symbol Characteristic POWER SUPPLY / CURRENT V Power Supply Voltage CC V CCO I Power Supply Current for VCC (Inputs and Outputs Open Power ...

Page 6

Table 6. AC CHARACTERISTICS V Symbol f Maximum Input Clock Frequency; MAX f Maximum Operating Data Rate (PRBS23) DATAMAX V Output Voltage Amplitude, EQEN = (Note 15) OUTPP (See Figure 10 Propagation Delay PLH t ...

Page 7

Figure 5. Differential Input Driven Single−Ended IHmax V thmax V ILmax thmin V IHmin V ILmin GND ...

Page 8

... Figure 15. Capacitor−Coupled Single−Ended Interface (V Connected REFAC http://onsemi.com NB7HQ14M Open GND Figure 12. LVDS Interface V CC NB7HQ14M REFAC GND Differential Interface Connected REFAC ...

Page 9

... W Driver Q Q Figure 17. Typical NB7HQ14M Equalizer Application and Interconnect with PRBS23 pattern at 6.5 Gbps, EQEN = 1 ORDERING INFORMATION Device NB7HQ14MMNG NB7HQ14MMNHTBG NB7HQ14MMNTXG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...

Page 10

... E2 e 3.25 0.128 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

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