nb6vq572m ON Semiconductor, nb6vq572m Datasheet

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nb6vq572m

Manufacturer Part Number
nb6vq572m
Description
1.8v / 2.5v Differential 4 1 Mux W/input Equalizer To 1 2 Cml Clock/data Fanout / Translator
Manufacturer
ON Semiconductor
Datasheet
NB6VQ572M
1.8V / 2.5V Differential 4:1
Mux w/Input Equalizer to
1:2 CML Clock/Data Fanout /
Translator
Multi−Level Inputs w/ Internal Termination
Description
Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that
operates up to 5 GHz / 6.5 Gbps respectively with a 1.8 V or 2.5 V
power supply.
which when placed in series with a Clock / Data path, will enhance the
degraded signal transmitted across an FR4 backplane or cable
interconnect. For applications that do not require Equalization,
consider the NB7V572M, which is pin−compatible to the
NB6VQ572M.
resistors and will accept differential LVPECL, CML, or LVDS logic
levels. The NB6VQ572M incorporates a pair of Select pins that will
choose one of four differential inputs and will produce two identical
CML output copies of Clock or Data.
Channel, Backplane and other Clock/Data distribution applications.
The two differential CML outputs will swing 400 mV when externally
loaded and terminated with a 50 W resistor to V
for low skew and minimal jitter.
Pb−Free package. Application notes, models, and support
documentation are available at www.onsemi.com. The NB6VQ572M
is a member of the ECLinPS MAX™ family of high performance
clock products.
Features
© Semiconductor Components Industries, LLC, 2009
April, 2009 − Rev. 0
The NB6VQ572M is a high performance differential 4:1 Clock /
Each INx / INx input pair incorporates a fixed Equalizer Receiver,
The differential Clock / Data inputs have internal 50 W termination
As such, the NB6VQ572M is ideal for SONET, GigE, Fiber
The NB6VQ572M is offered in a low profile 5x5 mm 32−pin QFN
Input Data Rate > 6.5 Gb/s Typical
Data Dependent Jitter < 10 ps
Maximum Input Clock Frequency > 5 GHz Typical
Random Clock Jitter < 0.8 ps RMS
Low Skew 1:2 CML Outputs, < 15 ps max
4:1 Multi−Level Mux Inputs, accepts LVPECL, CML,
LVDS
175 ps Typical Propagation Delay
45 ps Typical Rise and Fall Times
CC
and are optimized
1
Differential CML Outputs, 400 mV Peak−to−Peak,
Typical
Operating Range: V
= 0 V
Internal 50 W Input Termination Resistors
VREFAC Reference Output
QFN−32 Package, 5mm x 5mm, Pb−Free
−40°C to +85°C Ambient Operating Temperature
These are Pb−Free Devices
See detailed ordering and shipping information on page 10 of
this data sheet.
CASE 488AM
MN SUFFIX
(Note: Microdot may be in either location)
QFN32
1
ORDERING INFORMATION
A
WL
YY
WW
G
32
CC
http://onsemi.com
= 1.71 V to 2.625 V with GND
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Publication Order Number:
1
AWLYYWWG
MARKING
DIAGRAM
Q572M
NB6V
NB6VQ572M/D
G

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nb6vq572m Summary of contents

Page 1

... The two differential CML outputs will swing 400 mV when externally loaded and terminated with resistor to V for low skew and minimal jitter. The NB6VQ572M is offered in a low profile 5x5 mm 32−pin QFN Pb−Free package. Application notes, models, and support documentation are available at www.onsemi.com. The NB6VQ572M is a member of the ECLinPS MAX™ ...

Page 2

... W IN1 VREFAC1 IN2 50 W VT2 50 W IN2 VREFAC2 IN3 50 W VT3 50 W IN3 VREFAC3 IN0 1 VT0 2 VREFAC0 3 NB6VQ572M IN0 4 IN1 5 VT1 6 VREFAC1 7 IN1 Figure 2. Pinout: QFN−32 (Top View) EQ0 0 EQ1 1 4:1 MUX EQ2 2 EQ3 3 ...

Page 3

Table 2. PIN DESCRIPTION Pin Number Pin Name I IN0, IN0 LVPECL, CML IN1, IN1 LVDS Input 25, 28 IN2, IN2 29, 32 IN3, IN3 2, 6 VT0, VT1 26, 30 VT2, VT3 15 SEL0 LVTTL/LVCMOS ...

Page 4

Table 3. ATTRIBUTES ESD Protection R − SELx Input Pullup Resistor PU Moisture Sensitivity (Note 3) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 3. For additional information, see Application Note AND8003/D. Table 4. MAXIMUM ...

Page 5

Table 5. DC CHARACTERISTICS CML OUTPUT Symbol Characteristic POWER SUPPLY V Power Supply Voltage CC I Power Supply Current for (Inputs and Outputs Open) CML OUTPUTS (Note 6) V Output HIGH Voltage OH V Output LOW Voltage ...

Page 6

Table 6. AC CHARACTERISTICS V Symbol Characteristic f Maximum Input Clock Frequency MAX f Maximum Operating Data Rate DATAMAX f Maximum Toggle Frequency, SELx SEL V Output Voltage Amplitude (@ V OUTPP t , Propagation Delay to Differential PLH t ...

Page 7

... Figure 4. Inside Eye Height vs. Input Data Rate (Gbps) at Ambient Temperature (typical), FR4 = 12” FR4 − 12 Inch Backplane Q Driver Q DJ1 Figure 5. Typical NB6VQ572M Equalizer Application and Interconnect with PRBS23 Pattern at 6.5 Gbps Q AMP (mV) 1.0 2.0 3.0 4.0 5.0 6 CLOCK INPUT FREQUENCY (GHz vs. Input Frequency (f OUTPP 1 ...

Page 8

V CC INx 50 W VTx 50 W INx Figure 6. Input Structure IHmax V thmax V ILmax IHmin V thmin V ILmin V EE Figure 8. ...

Page 9

... GND http://onsemi.com NB6VQ572M OPEN CLKx GND GND Figure 15. LVDS Interface V CC NB6VQ572M REFAC GND Connected REFAC (Receiver ...

Page 10

... DEVICE ORDERING INFORMATION Device NB6VQ572MMNG NB6VQ572MMNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Package QFN−32 (Pb−free) QFN−32 (Pb−free) http://onsemi.com 10 † Shipping 74 Units / Rail ...

Page 11

... D 5.00 BSC D2 2.950 3.100 3.250 E 5.00 BSC E2 2.950 3.100 3.250 e 0.500 BSC K 0.200 −−− −−− L 0.300 0.400 0.500 5.30 3.20 3.20 5. 0.50 PITCH ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NB6VQ572M/D ...

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