mm74c906 Fairchild Semiconductor, mm74c906 Datasheet

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mm74c906

Manufacturer Part Number
mm74c906
Description
Mm74c906 Hex Open Drain N-channel Buffers
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2004 Fairchild Semiconductor Corporation
MM74C906M
(Note 1)
MM74C906N
MM74C906
Hex Open Drain N-Channel Buffers
General Description
The MM74C906 buffer employs monolithic CMOS technol-
ogy in achieving open drain outputs. The MM74C906 con-
sists of six inverters driving six N-channel devices. The
open drain feature of these buffers makes level shifting or
wire AND and wire OR functions by just the addition of pull-
up or pull-down resistors. All inputs are protected from
static discharge by diode clamps to V
Ordering Code:
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Pin Assignments for DIP and SOIC
Package Number
Top View
M14A
N14A
CC
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
and to ground.
DS005911
Features
Logic Diagram
Wide supply voltage range:
Guaranteed noise margin: 1V
High noise immunity: 0.45 V
High current sourcing and sinking open drain outputs
Package Description
October 1987
Revised January 2004
CC
3V to 15V
(typ.)
www.fairchildsemi.com

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mm74c906 Summary of contents

Page 1

... Hex Open Drain N-Channel Buffers General Description The MM74C906 buffer employs monolithic CMOS technol- ogy in achieving open drain outputs. The MM74C906 con- sists of six inverters driving six N-channel devices. The open drain feature of these buffers makes level shifting or wire AND and wire OR functions by just the addition of pull pull-down resistors ...

Page 2

Absolute Maximum Ratings Voltage at Any Input Pin 0. Voltage at Any Output Pin Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Operating V Range CC Absolute Maximum V CC Lead Temperature ( ...

Page 3

AC Electrical Characteristics pF, unless otherwise specified A L Symbol Parameter t Propagation Delay Time Logical “0” t Propagation Delay Time Logical “1” C Input Capacitance IN C Output ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow www.fairchildsemi.com Package Number M14A 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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