hef4027b NXP Semiconductors, hef4027b Datasheet

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... DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4027B flip-flops Dual JK flip-flop Product specification File under Integrated Circuits, IC04 INTEGRATED CIRCUITS ...

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... Philips Semiconductors Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (S ), clear direct (C ), clock (CP) inputs and outputs D D (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct ( are independent and override the J, K, and CP inputs ...

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... PLH PLH 25 5 120 t 45 PHL 35 5 140 t 55 PHL 40 3 Product specification HEF4027B TYPICAL EXTRAPOLATION MAX. FORMULA 210 (0,55 ns/pF (0,23 ns/pF (0,16 ns/pF) C 170 (0,55 ns/pF (0,23 ns/pF (0,16 ns/pF) C 140 (0,55 ns/pF ...

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... Fig.4 MHz where input freq. (MHz output freq. (MHz load capacitance (pF sum of outputs supply voltage (V) DD Product specification HEF4027B flip-flops (0,55 ns/pF (0,23 ns/pF (0,16 ns/pF (1,0 ns/pF (0,42 ns/pF (0,28 ns/pF (1,0 ns/pF (0,42 ns/pF (0,28 ns/pF ...

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... Waveforms showing set-up times, hold times and minimum clock pulse width. Set-up and hold times are shown as positive values but may be specified as negative values. Fig.5 Waveforms showing recovery times for S APPLICATION INFORMATION Some examples of applications for the HEF4027B are: Registers Counters Control circuits ...