hef4042b NXP Semiconductors, hef4042b Datasheet
hef4042b
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hef4042b Summary of contents
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... DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4042B MSI Quadruple D-latch Product specification File under Integrated Circuits, IC04 INTEGRATED CIRCUITS ...
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... Philips Semiconductors Quadruple D-latch DESCRIPTION The HEF4042B is a 4-bit latch with four data inputs ( four buffered latch outputs (O 3 complementary latch outputs (O 0 enable inputs (E and E ). Information transferred while both same state, either HIGH or LOW. O ...
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... Fig.3 Logic diagram. Fig.4 Logic diagram (one latch). January 1995 FUNCTION TABLE Note HIGH state (the more positive voltage LOW state (the less positive voltage). 3 Product specification HEF4042B MSI OUTPUT latched latched D n ...
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... C = load capacitance (pF sum of outputs supply voltage (V) DD Product specification HEF4042B MSI (0,55 ns/pF (0,23 ns/pF (0,16 ns/pF (0,55 ns/pF (0,23 ns/pF (0,16 ns/pF (0,55 ns/pF (0,23 ns/pF (0,16 ns/pF (0,55 ns/pF (0,23 ns/pF (0,16 ns/pF (1,0 ns/pF (0,42 ns/pF) C ...
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... Philips Semiconductors Quadruple D-latch Either held HIGH or LOW while the other enable input is pulsed the function table shows. Fig.5 Waveforms showing propagation delays for with latch enabled. January 1995 5 Product specification HEF4042B MSI ...
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... Philips Semiconductors Quadruple D-latch Fig.6 Waveforms showing minimum enable pulse width, set-up time and hold time for E and D. Set-up and hold-times are shown as positive values but may be specified as negative values. January 1995 6 Product specification HEF4042B MSI ...