mc74lcx574 ON Semiconductor, mc74lcx574 Datasheet

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mc74lcx574

Manufacturer Part Number
mc74lcx574
Description
Low-voltage Cmos Octal D-type Flip-flop Flow Through Pinout
Manufacturer
ON Semiconductor
Datasheet

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MC74LCX574
Low−Voltage CMOS
Octal D−Type Flip−Flop
Flow Through Pinout
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
D−type flip−flop operating from a 2.3 to 3.6 V supply. High
impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A V
MC74LCX574 inputs to be safely driven from 5.0 V devices.
individual D−type inputs and 3−state true outputs. The buffered clock
and buffered Output Enable (OE) are common to all flip−flops. The
eight flip−flops will store the state of individual D inputs that meet the
setup and hold time requirements on the LOW−to−HIGH Clock (CP)
transition. With the OE LOW, the contents of the eight flip−flops are
available at the outputs. When the OE is HIGH, the outputs go to the
high impedance state. The OE input level does not affect the operation
of the flip−flops. The LCX574 flow through design facilitates easy PC
board layout.
Features
*For additional information on our Pb−Free strategy and soldering details, please
February, 2005 − Rev. 5
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC74LCX574 is a high performance, non−inverting octal
The MC74LCX574 consists of 8 edge−triggered flip−flops with
5 V Tolerant − Interface Capability With 5 V TTL Logic
Supports Live Insertion and Withdrawal
I
LVTTL Compatible
LVCMOS Compatible
24mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Designed for 2.3 to 3.6 V V
Latchup Performance Exceeds 500 mA
ESD Performance:
Pb−Free Packages are Available*
Semiconductor Components Industries, LLC, 2005
OFF
Specification Guarantees High Impedance When V
Human Body Model >2000 V
Machine Model >200 V
CC
Operation
I
specification of 5.5 V allows
CC
= 0 V
1
20
20
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
20
1
1
1
ORDERING INFORMATION
A
L, WL
Y, YY
W, WW
http://onsemi.com
CASE 948E
SOEIAJ−20
TSSOP−20
DT SUFFIX
CASE 967
DW SUFFIX
M SUFFIX
CASE 751D
SOIC−20
= Assembly Location
= Wafer Lot
= Year
= Work Week
Publication Order Number:
20
1
20
20
1
1
DIAGRAMS
MARKING
74LCX574
MC74LCX574/D
AWLYYWW
AWLYWW
LCX574
ALYW
LCX
574

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mc74lcx574 Summary of contents

Page 1

... TTL compatible outputs offer improved switching noise performance MC74LCX574 inputs to be safely driven from 5.0 V devices. The MC74LCX574 consists of 8 edge−triggered flip−flops with individual D−type inputs and 3−state true outputs. The buffered clock and buffered Output Enable (OE) are common to all flip−flops. The eight flip− ...

Page 2

... Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition Change X = High or Low Voltage Level and Transitions are Acceptable Z = High Impedance State = Low−to−High Transition = Not a Low−to−High Transition; For I MC74LCX574 ...

Page 3

... Input Transition Rise or Fall Rate, V ORDERING INFORMATION Device MC74LCX574DWR2 MC74LCX574DWR2G MC74LCX574DT MC74LCX574DTR2 MC74LCX574MEL †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. MC74LCX574 Value −0.5 to +7.0 − ...

Page 4

... OSHL t OSLH 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t guaranteed by design. MC74LCX574 Condition 2 3 ...

Page 5

... CP 1 max PLH PHL On 1.5 V WAVEFORM 1 − PROPAGATION DELAYS, SETUP AND HOLD TIMES 2.5 ns, 10 MHz MC74LCX574 Condition Condition ...

Page 6

... MC74LCX574 PULSE GENERATOR R T TEST PLH PHL PZL PLZ Open Collector/Drain t and t PLH PZH PHZ equivalent (Includes jig and probe capacitance 500 W or equivalent pulse generator (typically OUT Figure 4. Test Circuit http://onsemi.com ...

Page 7

... L PIN 1 IDENT 1 0.15 (0.006 −V− 0.100 (0.004) −T− SEATING PLANE MC74LCX574 PACKAGE DIMENSIONS SOIC−20 DW SUFFIX CASE 751D−05 ISSUE SEATING PLANE C T TSSOP−20 DT SUFFIX CASE 948E−02 ISSUE ...

Page 8

... BSC H E 7.40 8.20 0.291 0.323 L 0.50 0.85 0.020 0.033 L 1.10 1.50 0.043 0.059 0.70 0.90 0.028 0.035 Z −−− 0.81 −−− 0.032 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MC74LCX574/D ...

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