mc145074 Freescale Semiconductor, Inc, mc145074 Datasheet
mc145074
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mc145074 Summary of contents
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... Stereo Audio Sigma-Delta Digital-to-Analog Converter CMOS The MC145074 is a high precision, Stereo Audio Digital–to–Analog Converter that utilizes second order sigma–delta modulators with 2–tap FIR feedback architecture. The part can be used as a stand alone stereo digital modulator companion part to the MC145076 smoothing filter to achieve high quality, low cost audio performance. Peak S/(N+D) > ...
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... Parameter I dd Power Supply Current V IL Input Voltage Output Voltage lkg Input Leakage Current MC145074 2 Value Unit guard against damage due to high static volt- 6.0 V ages or electric fields. However, precautions must be taken to avoid applications of any volt – 0 age higher than maximum rated voltages 0.5 this high– ...
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... BCLK (1st Edge Only) Lead Time (DMODE = WDLY = 1) MOTOROLA Parameter Guaranteed Limit Figure Unit 18.5 MHz 37.0 18.5 MHz MC145074 3 ...
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... Mode WCLK BCLK Figure 5. WCLK Timing (All Modes Except DMODE = 1, WDLY = 50% t LAG 50% BCLK WCLK 50% Figure 6. WCLK Timing (DMODE = 1, WDLY = 1) MC145074 4 SWITCHING WAVEFORMS X in 50% 10% 90% 50% DOL/DOR 10% Figure 2. DOL/DOR Propagation Delay Timing DIL/DIR/DILR 10% 50 90% ...
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... X out is the inverted output signal and may be used for a buffered clock output or for a crystal oscillator Master Clock Input (Pin 12 the input clock pin for the MC145074, and may be used with X out as the inverter for a crystal oscillator. DMODE Data Mode Input (Pin 13) A low level on the DMODE pin will select the dual data pin mode of operation ...
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... MHz, and can be used with any sampling rate including 32, 44. kHz. The MC145074 can accept a 1x input clock with serial data output chop. The device can accept 16, 18, or 20–bit digital data in a dual data pin input format, or single pin multiplexed format ...
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... When operating in a single pin multiplexed mode, the DIR input pin is reconfigured as the DILR pin. Left and right chan- nel serial input data is multiplexed into the MC145074 on the DILR pin, and is serially shifted into the part using BCLK as shown in Figure 13. When WDLY is low, left channel data is latched into the part on the rising edge of WCLK, and right channel data is latched on the falling edge of WCLK ...
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... MC145074 8 MOTOROLA ...
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... MOTOROLA MC145074 9 ...
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... MC145074 10 MOTOROLA ...
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... MOTOROLA MC145074 11 ...
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... MC145074 12 MC145076 MC145074 MC145076 MOTOROLA ...
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... MOTOROLA MC145076 MC145074 MC145076 MC145074 13 ...
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... IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 0.386 0.393 9.80 10.00 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.016 0.049 0.40 1.25 1.27 BSC 0.050 BSC G J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 *MC145074/D* MC145074/D MOTOROLA ...