mc145220 Freescale Semiconductor, Inc, mc145220 Datasheet
mc145220
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mc145220 Summary of contents
Page 1
... The counters are programmed via a synchronous serial port which is SPI compatible. The serial port is byte–oriented to facilitate control via an MCU. Due to the innovative BitGrabber Plus registers, the MC145220 may be cascaded with other peripherals featuring BitGrabber Plus without requiring leading dummy bits or multiple address bits in the serial data stream. In addition, BitGrabber Plus peripherals may be cascaded with existing BitGrabber peripherals ...
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... PIN (Positive Power to the main PLL, Reference Circuit, and a portion of the Serial Port) PIN 6 = GND (Ground to the main PLL, Reference Circuit, and a portion of the Serial Port) PIN (Positive Power to PLL and a portion of the Serial Port) PIN 15 = GND (Ground to PLL and a portion of the Serial Port) MC145220 2 BLOCK DIAGRAM A AND N COUNTERS ...
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... However, precautions must be taken to avoid applications of any volt- age higher than maximum rated voltages to this high–impedance circuit. Guaranteed Limit Unit 0 0 100 mV 0 – 0.1 V 0.5 mA 0.5 mA 0.5 mA 0.5 mA – 0.4 mA – 0.4 mA – 0.4 mA 1.0 A 150 A 150 MC145220 3 ...
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... Maximum Input Rise and Fall Times — CLK * The minimum limit is 3 REF in cycles or 195 cycles with selection of a 64/65 prescale ratio cycles with selection of a 32/33 prescale ratio, whichever is greater. MC145220 @ 4 out ...
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... OUTPUT A V+ ENB 50% GND CLK 50% GND FIRST CLOCK Includes all probe and fixture capacitance. V+ 50% GND t PLZ t PZL 50% 10% Figure GND rec V+ LAST GND CLOCK Figure 4. V+ TEST POINT 7.5 k DEVICE UNDER TEST Figure 6. MC145220 5 ...
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... Operating Frequency of the Phase Detectors t w Output Pulse Width (Figures 11 and 12 Input Capacitance, REF in * Power level at the input to the dc block. MC145220 6 Test Condition (Figure 7) 40 MHz frequency < 300 MHz 300 MHz frequency < 700 MHz 700 MHz frequency < 1100 MHz ...
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... OUTPUT A POINT ( GND REF out * Includes all probe and fixture capacitance. TEST OUTPUT A POINT ( TEST POINT ( TEST REF out POINT out 50% Figure 10. Switching Waveform TEST POINT DEVICE UNDER TEST Figure 12. Test Circuit MC145220 7 ...
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... SOG PACKAGE – (PIN 13) SOG PACKAGE –j1 Figure 13. Nominal Input Impedance and f in — Series Format (R + jX) MC145220 – (PIN 8) – SOG PACKAGE Frequency Point (MHz Supply 50 A 1900 – j 157 400 B 1440 – j 228 ...
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... ENB is high and CLK is low. This input is Schmitt–triggered and switches near 50% of V+, thereby minimizing the chance of loading erroneous data into the registers. See the last paragraph for more information. For POR information, see the note for the CLK pin. NOTE NOTE MC145220 9 ...
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... R register control the modes as shown in Figure 16. In the crystal mode, these pins form a reference oscillator when connected to terminals of an external parallel–reso- nant crystal. Frequency–setting capacitors of appropriate MC145220 10 values, as recommended by the crystal supplier, are con- nected from each of the two pins to ground ( maximum each, including stray capacitance) ...
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... C4 i registers, determine the amount Current 50 80 100 – Table 3. Rx Values PD out or PD out Current in Rx 100% Mode MC145220 and i 11 ...
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... GND and V+ bypassed to GND i tance capacitors mounted very close to the MC145220. Lead lengths and printed circuit board traces to the capacitors should be minimized. (The very fast switching speed of the device can cause excessive current spikes on the power leads if they are improperly bypassed.) ...
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... REF in (only 1 mode) is gated i and V . When reset low, the current source/sink the second case, the appropriate Register Accesses and Format (8 Clock Cycles are Used LSB C1 C0 only i are placed in standby via the i standby does not affect i pin i register i MC145220 13 ...
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... Figure 15. A and A i MC145220 14 Register Accesses and Format (24 Clock Cycles are Used) MOTOROLA ...
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... COUNTER = 8190 COUNTER = 8191 HEXADECIMAL VALUE registers are not affected subsequent 24–bit write to the A register. The respective R counter begins dividing by the i NOTE LSB MC145220 15 ...
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... Figure 14 for POL High voltage level Low voltage level. 4. The waveforms are applicable to both the main PLL and PLL . Figure 17. Phase/Frequency Detectors and Lock Detector Output Waveforms MC145220 ...
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... Figure 18. The crystal should be specified for a loading capacitance which does not exceed approximately 20 pF when used near the highest operating frequency of the MC145220. Assuming the shunt load capacitance pres- ented across the crystal can be estimated to be out ...
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... Table 4. Partial List of Crystal Manufacturers Motorola — Internet Address http://motorola.com NOTE: Motorola cannot recommend one supplier over another and in no way suggests that this is a complete listing of crystal manufacturers. MC145220 18 Control”, Electro–Technology , June 1969 Ottowitz, “A Guide to Crystal Selection”, Electronic Design , May 1966. D. Babin, “ ...
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... AN1253, An Improved PLL Design Method Without n and , Motorola Semiconductor Products, Inc., 1995. MOTOROLA K K VCO sRC Z( VCO n = NCR 1 C VCO ASSUMING GAIN A IS VERY LARGE, THEN Z( radians per volt 0.7 and a natural loop frequency VCO /50) MC145220 19 ...
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... LD and LD are open–drain outputs. This allows the wired–OR configuration shown. Note that R1 and Q1 form the “pull–up device”. 6. Use optional and depends on loading. Figure 21. Application Showing Use of the Two Single–Ended Phase/Frequency Detectors MC145220 20 NOTE 5 R1 MC145220 1 REF ...
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... OUTPUT A ENB (PORT) pins to GND and GND with low–inductance capacitors this determines the values (N, A) that must be programmed into the N and A counters, +V NOTE MCU LOW–PASS FILTER VCO +V BUFFER OUTPUT MC145220 21 ...
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... LD and LD are open–drain outputs. This allows the wired–OR configuration shown. Note that R1 and Q1 form the “pull–up device”. 6. Use optional and depends on loading. Figure 23. Application Showing Use of Both the Single– and Double–Ended Phase/Frequency Detectors D in CMOS MCU NOTE: See related Figures 25, 26, and 27. MC145220 22 NOTE 5 R1 MC145220 1 REF REF out CLK 3 18 ...
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... Two Cascaded MC145220 Devices (32 Clock Cycles are Used) MC145220 23 ...
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... Two Cascaded MC145220 Devices (48 Clock Cycles are Used) MOTOROLA ...
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... Figure 27. Accessing the R Registers of Two Cascaded MC145220 Devices (40 Clock Cycles are Used) MC145220 25 ...
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... S S TSSOP (THIN SHRUNK SMALL OUTLINE PACKAGE PIN ONE IDENTIFICATION 1 C 0.100 (0.004 -T- SEATING PLANE SECTION A-A MC145220 26 PACKAGE DIMENSIONS F SUFFIX CASE 803C– 0.10 (0.004) M –T– SEATING PLANE DT SUFFIX CASE 948D– REF 0.200 (0.008 ...
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... JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, 4–32–1 Nishi–Gotanda, Shagawa–ku, Tokyo, Japan. 03–5487–8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 CUSTOMER FOCUS CENTER: 1–800–521–6274 MC145220/D MC145220 27 ...