mc14560b Freescale Semiconductor, Inc, mc14560b Datasheet - Page 7

• Manufacturer Part Number: mc14560b
• Description: Nbcd Adder
• Manufacturer: Freescale Semiconductor, Inc

End Around Carry are shown in Figures 6 and 7. Note the
use of B S from the exclusive–OR of Add/Sub and B S . B S
eliminates Add/Sub as a variable in the truth table. As an ex-
ample of truth table generation, consider an n decade adder/
subtracter where A S = “0”, B S = “1”, and Add/Sub = “0”. B is
in 9’s complement form, 10 N – 1 – B. Thus A + (10 N – 1 – B)
= 10 N – 1 + (A – B). There is no carry when A
sign is negative (sign = “1”). When A S and B S are opposite
states and Add/Sub is a “0” (add mode), no overflow can oc-
cur (overflow = “0”). The other output states are determined
in a similar manner (see Figure 6).
Carry is composed of the two symmetrical functions S2 and
S3 of three variables with A S B S C out as the center of sym-
metry. This is the definition of the majority logic function
M 3 (ABC). Similarly the Sign is composed of the symmetrical
functions S2(3) and S3(3) but with the center of symmetry
MOTOROLA CMOS LOGIC DATA
The truth table and Karnaugh maps for sign, overflow, and
From the Karnaugh maps it is apparent that End Around
SIGNIFICANT
DECADE
LEAST
Typical Subtract Time = 0.6 + 0.4n s where n = Number of Decades
C in
C
OF MOST SIGNIFICANT
A1
SUBTRACT
BLOCK
BASIC
R1
R1
FROM C out
DECADE
C n
B1
C out
Figure 6. Subtraction of Unsigned NBCD Numbers
C in
A1
V DD
A2
v
C in
C
A
(a) Basic Subtracter Block
B, and the
(b) n–Decade Subtracter
A3
A2
C
C
Z
A4
S1
A1
F1
R2
V DD
RESULT, R
MC14560
S2
A2
MC14561
F2
B2
C out
S3
A3
F3
translated to A S B S C out . This is equivalent to the majority
function M 3 (A S B S C out ). Further evaluation of the maps and
truth table reveal that Overflow can be generated by the
exclusive–OR function of End Around Carry and Carry Out.
This analysis results in a minimum device count consisting of
one exclusive–OR package and one dual Majority Logic
package to implement B S , EAC, Sign and Overflow. The
logic connections of these devices are shown in Figure 5.
subtract operation when R S = “1”. This is required because
the adder performs 9’s complement arithmetic. Complement-
ing, when R S indicates the result is negative, restores sign
and magnitude convention.
For example, 9’s complement is available at the output of the
NBCD adders, and output complementers are eliminated if
sign and magnitude output is not required.
C
C
Z
SIGNIFICANT
The output sign, R S , complements the result of the add/
Several variations of the adder/subtracter are possible.
DECADE
S4
A4
A1
F1
B1
F4
MOST
MC14561
A2
B2
F2
B
A3
F3
B3
C in
C
A n
A4
F4
AB
C out
R n
B n
C out
C n + 1
(NEGATIVE RESULT)
“0” INDICATES
UNDERFLOW
MC14560B
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