74lvc2g17gw NXP Semiconductors, 74lvc2g17gw Datasheet
74lvc2g17gw
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74lvc2g17gw Summary of contents
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Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 04 — 9 October 2006 1. General description The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can ...
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... Package Temperature range 74LVC2G17GW +125 C 74LVC2G17GV +125 C 74LVC2G17GM +125 C 74LVC2G17GF +125 C 5. Marking Table 2. Marking codes Type number 74LVC2G17GW 74LVC2G17GV 74LVC2G17GM 74LVC2G17GF 6. Functional diagram mnb066 Fig 1. Logic symbol Fig 3. Logic diagram 74LVC2G17_4 Product data sheet ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning 74LVC2G17 GND 001aaf078 Fig 4. Pin configuration SOT363 and SOT457 7.2 Pin description Table 3. Pin description Symbol Pin 1A 1 GND Functional description [1] Table 4. Function table Input ...
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... NXP Semiconductors 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level output voltage OH I input leakage current I I power-off leakage current OFF I supply current CC I additional supply current CC C input capacitance +125 C amb ...
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... NXP Semiconductors 12. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t propagation delay nA to nY; see power dissipation per buffer capacitance V = GND [1] Typical values are measured at T [2] ...
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... NXP Semiconductors Table 9. Measurement points Supply voltage 1. 2.7 V 2 3 5.5 V Measurement points are given in Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times ...
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... NXP Semiconductors 14. Transfer characteristics Table 11. Transfer characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V positive-going see T+ threshold voltage negative-going see T threshold voltage hysteresis voltage ( Figure [1] All typical values are measured ...
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... NXP Semiconductors Fig 11. Typical transfer characteristic (1) Positive-going edge (2) Negative-going edge Linear change of V between 0 2.0 V. All values given are typical unless otherwise specified. I Fig 12. Average function 74LVC2G17_4 Product data sheet Dual non-inverting Schmitt trigger with 5 V tolerant input ...
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... NXP Semiconductors 16. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 0.30 1.1 0.25 mm 0.1 0.20 0.8 0.10 OUTLINE VERSION IEC SOT363 Fig 13. Package outline SOT363 (SC-88) 74LVC2G17_4 Product data sheet Dual non-inverting Schmitt trigger with 5 V tolerant input ...
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... NXP Semiconductors Plastic surface-mounted package (TSOP6); 6 leads y 6 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT 0.1 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT457 Fig 14. Package outline SOT457 (SC-74) 74LVC2G17_4 Product data sheet Dual non-inverting Schmitt trigger with 5 V tolerant input ...
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... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION ...
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... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 OUTLINE VERSION IEC SOT891 Fig 16. Package outline SOT891 (XSON6) 74LVC2G17_4 Product data sheet ...
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... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74LVC2G17GF (SOT891 package). 74LVC2G17_3 ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Functional description . . . . . . . . . . . . . . . . . . . 3 9 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 13 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 14 Transfer characteristics ...