pcf8811 NXP Semiconductors, pcf8811 Datasheet
pcf8811
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pcf8811 Summary of contents
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... DATA SHEET PCF8811 80 128 pixels matrix LCD driver Product specification Supersedes data of 2002 Dec 04 INTEGRATED CIRCUITS 2004 May 17 ...
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... Product specification PCF8811 2 I C-BUS INTERFACE 2 Characteristics of the I C-bus (Hs-mode C-bus Hs-mode protocol Command decoder INSTRUCTIONS Explanation of the symbols Initialization Reset function Power-save mode Display control Set Y address of RAM Set X address of RAM Set display start line ...
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... GENERAL DESCRIPTION The PCF8811 is a low power CMOS LCD controller driver, designed to drive a graphic display of 80 rows and 128 columns or a graphic display of 79 rows and 128 columns and a icon row of 128 symbols. All necessary functions for the display are provided in a single chip, ...
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... PROCESSING DISPLAY DATA RAM 80 128 bits ADDRESS COUNTER COMMAND DECODER I/O BUFFER 2 PARALLEL/SERIAL/I C-BUS INTERFACE 3 Fig.1 Block diagram. 4 Product specification ROW 0 to ROW 79 80 ROW DRIVERS ORTHOGONAL FUNCTION GENERATOR RESET OSCILLATOR TIMING GENERATOR DISPLAY ADDRESS COUNTER PCF8811 PCF8811 RES OSC mgw732 ...
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... V offset input pad 4 LCD V offset input pad 3 LCD V offset input pad 2 LCD 5 Product specification DESCRIPTION PCF8811 ...
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... V according to the specified voltage range. An external LCD supply voltage can be supplied using the V this case, V the internal voltage generator must be switched off. If the PCF8811 is in power-save mode, the external LCD supply voltage can be switched off. 7.7 is used as DD1 can be connected T1, T2 and T5 must be connected left open-circuit ...
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... C-bus used as the serial output of the serial interface (SDO DD1 SS1 7.19.3 DB3 and DB2 are respectively the SA1 and SA0 inputs when the I that up to four PCF8811s can be distinguished on one 2 I C-bus interface. 7 Product specification SCLH/SCE SDAH and V . DD1 ...
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... DON, DAL and E in the command display control; see Table external 8.6 DD1 The PCF8811 contains 80 row and 128 column drivers, which connect the appropriate LCD bias voltages in sequence to the display in accordance with the data to be displayed. 128-bit static RAM which 2 C-bus interface ...
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... Philips Semiconductors 80 128 pixels matrix LCD driver bank 0 bank 1 bank 2 bank 3 bank 9 2004 May 17 DPRAM LCD MGW734 Fig.2 DDRAM to display mapping. 9 Product specification PCF8811 top of LCD R0 R8 R16 R24 R72 R79 ...
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... LCD driver 9 ADDRESSING Data is downloaded in bytes into the RAM matrix of the PCF8811 as indicated in Fig.2. The display RAM has a matrix 128 bits. The columns are addressed by the address pointer. The address ranges are 127 (1111111 (1001). The Y address represents the bank number ...
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... RAM is not being used. After the very last address the address pointers wrap around to address and both horizontal and vertical addressing modes. 2 130 258 386 514 642 770 898 X address 11 Product specification PCF8811 0 Y address 1279 9 127 MGW736 ...
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... The data order bit (DOR) defines the bit order (LSB or MSB on top) for writing into the RAM (see Figs 6 and 7). This feature is only available in the extended command set. LSB handbook, full pagewidth MSB LSB MSB Fig.6 RAM byte organisation, if DOR = 0 (extended command set). 2004 May 17 1279 X address 127 12 Product specification PCF8811 0 Y address 9 MGW737 MGW738 ...
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... Fig.8). When the mirroring is disabled and the address located at the left side (column 0) of the display (see Fig.9). handbook, full pagewidth X max Fig.8 RAM format addressing ( (both command sets). 2004 May 17 X address Y address 13 Product specification PCF8811 MGW739 0 Y max 0 MGW740 ...
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... The icon row, when enabled, will always be located in bank 9 and ROW 79. handbook, full pagewidth 0 Fig.10 RAM format addressing ( (both command sets). 2004 May 17 X address Y address X address Y address 14 Product specification PCF8811 0 Y max X max MGW741 Y max 0 X max MGW742 ...
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... Chapter 18 (see Figs 35 and 36). The timing diagrams differ because the clock is connected (in Fig.35) to the enable (E) input. In Fig.36 the clock is connected to the chip select input (SCE) and the enable input (E) is tied HIGH. 15 Product specification PCF8811 0 Y max X max MGW743 OPERATION command data write ...
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... LCD driver chip. The 3 lines are: SCE (chip enable), SCLK (serial clock) and SDATA (serial data). For the 4-line serial interface a separate D/C line is added. The PCF8811 is connected to the serial data I/O (SDA) of the microcontroller by two pins: SDATA (data input) and SDO (data output) connected together ...
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... EAD MODE ONLY EXTENDED COMMAND SET The read mode of the interface means that the microcontroller reads data from the PCF8811 the microcontroller first has to send a command (the read status command) and then the PCF8811 will respond by transmitting data on the SDO line. After that SCE is required to go HIGH (see Fig ...
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... Figure 17 shows the general format of the write mode and the definition of the transmission byte. Any instruction can be sent in any order to the PCF8811; the MSB is transmitted first. The serial interface is initialized when SCE is HIGH. In this state, SCLK clock pulses have no effect and no power is consumed by the serial interface ...
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... May 17 DB2 DB1 DB0 LSB TB D/C Fig.17 Serial data stream; write mode. DB7 DB6 DB5 DB4 DB3 D/C Fig.19 Write mode: transmission of several bytes. 19 Product specification TB D/C MGU278 DB2 DB1 DB0 MGU279 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 D/C PCF8811 MGU280 ...
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... EAD MODE ONLY EXTENDED COMMAND SET The read mode of the interface means that the microcontroller reads data from the PCF8811 the microcontroller first has to send a command (the read status command) and then the following byte is transmitted in the opposite direction (using SDO) (see Fig ...
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... In this event the transmitter must leave the data line HIGH to enable the master to generate a STOP condition. 21 Product specification B IT TRANSFER START STOP AND CONDITIONS A CKNOWLEDGE PCF8811 ...
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... SLAVE SLAVE TRANSMITTER/ RECEIVER RECEIVER Fig.22 System configuration. data line change stable; of data data valid allowed Fig.23 Bit transfer. Fig.24 Definition of START and STOP conditions. 22 Product specification PCF8811 MASTER MASTER TRANSMITTER/ TRANSMITTER RECEIVER MGA807 MBC621 SDA SCL P STOP condition MBC622 ...
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... SCL FROM MASTER 2 12.2 I C-bus Hs-mode protocol The PCF8811 is a slave receiver/transmitter. If data read from the device, the SDAH pin must be connected, otherwise SDAH may be unused. Hs-mode can only commence after the following conditions: START condition (S) 8-bit master code (00001XXX) Not-acknowledge bit (A) ...
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... May 17 ACTION The data pointer is automatically updated and the data is directed to the intended PCF8811 device. If the D/C bit of the last control byte was set to logic 0, these command bytes will be decoded and the setting of the device will be changed according to the received commands. The acknowledgement after each byte is made only by the addressed PCF8811 ...
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... DATA A/ acknowledge from PCF8811 control byte data byte D/C 1 byte n Co MSB . . . . . . . . . . . LSB Product specification PCF8811 then Fs mode If Sr (dotted lines) then Hs mode MSC618 acknowledge from PCF8811 bytes MGW749 ...
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... I C-bus interface. Processing of the instructions does not require the display clock. Data accesses to the PCF8811 can be broken down into two areas; those that define the operating mode of the device, and those that fill the display RAM. 2004 May 17 acknowledgement ...
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Acrobat reader. white to force landscape pages to be ... Table 5 Instruction set; note 1 (2) INSTRUCTION EXT D/C R/W D7 NOP X ...
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Acrobat reader. white to force landscape pages to be ... (2) INSTRUCTION EXT D/C R/W D7 Set partial display ...
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... OP LOGIC 1 display on inverse video mode all pixels on X mirroring Y mirroring start frame frequency calibration 0 start internal oscillator 29 Product specification PCF8811 in the basic command set OP [2:0] RESET STATE 0000000 0000 ...
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... Table 4 if RES = 1 a reset is in progress device manufacturer ID device recognition; see Table 10 30 Product specification DESCRIPTION HVgen off HVgen on HVgen on HVgen on DESCRIPTION ; oscillator off; HVgen disabled; note 2 ; oscillator off; HVgen disabled SS DESCRIPTION DESCRIPTION 64 row driver 80 row driver PCF8811 ...
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... Product specification DECIMAL +12 +13 +14 + LOGIC1 RESET STATE 000000 000 LCD PCF8811 BINARY 01100 01101 01110 01111 11111 11110 11101 11100 11011 11010 11001 11000 10111 10110 10101 10100 10011 10010 10001 10000 ...
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... DESCRIPTION 000 2 voltage multiplier 001 3 voltage multiplier 010 4 voltage multiplier 011 5 voltage multiplier 100 4 voltage multiplier 101 5 voltage multiplier 110 6 voltage multiplier 111 7 voltage multiplier Initialization DD1 (or higher) within a maximum time t DD(min) goes high (see Fig.43). DD1 PCF8811 when V DD1 VHRL ...
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... RAM must first be rewritten, after changing the MX bit. 13.5.2 When the display is mirrored vertically. A change of this bit has an immediate effect on the display. 33 Power-save mode (display off) SS generator switched off; LCD can be disconnected LCD discharged Power-down mode. LCD SS Display control MX MY Product specification PCF8811 ...
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... An example of the mapping from the RAM content to the 0 to 127 display is illustrated in Fig.30. The content of the RAM is not modified. This feature allows, for instance, screen 0 to 127 scrolling without rewriting the RAM 127 0 to 127 0 to 127 0 to 127 34 Product specification PCF8811 ...
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... Product specification PCF8811 Display ROW 0 ROW 1 ROW 2 ROW 3 ROW 4 ROW 5 ROW ROW 7 ROW 8 ROW 9 ROW 10 ROW 11 ROW 12 ROW 13 ROW 14 ROW 15 ROW 16 ROW ROW 18 ROW 19 ROW 20 ROW 21 ...
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... – . The column voltage levels are equidistant from each C 36 Product specification PCF8811 and F have the same value. The max G max = LCD 0.75G max 0.50G max 0.25G max V C 0.75G max 0.50G max 0.25G max ...
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... Table 20. The variables for calculating V LCD enabled, are given in Table 21. The icon row can only be addressed in the extended command set. The PCF8811 allows the value of p, for certain mux rates chosen manually. 2004 May 17 BIAS VOLTAGES F ...
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... Where V is the threshold voltage of the liquid crystal material used. TH The way of programming the V OP extended command set. In the basic command set two commands are sent to the PCF8811: namely V V [2:0]. In the extended command set only one command V OFF illustrated in Fig.32. The programming of V replacement for an IAPT LCD driver ...
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... LCD [4:0] LCD CUT is a reference temperature (see Section 13.11) CUT [7:0] is the programmed [4:0]/MMVOPCAL[4:0] is the value of the offset V OS allows values above the maximum allowed V Product specification PCF8811 [4:0]) the V OP LCD + V [7:0] b (5) PR value LCD LCD register PR LCD ...
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... However, the possibility exists to program the default temperature coefficient by means of OTP programming; see Chapter 22. In the extended command set the different temperature coefficients are selected by the interface with three bits TC[2:0]. 2004 May Fig.33 V programming of PCF8811. LCD might have to LCD handbook, halfpage V LCD ) is given by CUT (6) – ...
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... SS 15 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take normal precautions appropriate to handling MOS devices (see “Handling MOS devices” ). 2004 May 17 PARAMETER 41 Product specification PCF8811 MIN. MAX. UNIT 0.5 +6.5 V 0.5 +4 ...
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... LCD with calibration; note 2 notes 3 and 4 notes 4 and 5 notes 3 and 4 notes 5 and 4 notes 5 and LCD LCD 42 Product specification PCF8811 MIN. TYP. MAX. 1.7 3.3 2.0 3.3 1.8 3.3 9.0 9.0 300 +300 70 +70 0.5 1 0.5 1 ...
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... SS 0.8V DD1 V SS 0.8V DD1 < 0.7V DD1 V SS 0.8V DD1 , inputs at V DD2 DD1 = 25 C. amb MIN. TYP. 200 ( 500 PCF8811 MAX. UNIT / 0.2V V DD1 V V DD1 0.2V V DD1 V V DD1 0.3V V DD1 V V DD1 0.2V V DD1 V V DD1 interface SS MAX ...
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... HD;DAT t data output access time DAT;ACC t data output disable time DAT;OH 2004 May 17 = maximum 9 +85 C; unless otherwise specified. LCD amb PARAMETER 44 Product specification PCF8811 MIN. MAX. UNIT 1000 ns 320 ns 300 ns 280 ns 20 ...
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... Philips Semiconductors 80 128 pixels matrix LCD driver handbook, full pagewidth RW D/C SCE (write (read) 2004 May 17 t SU;CE t SU;RW t SU;DC t DS(H) t DAT;ACC Fig.35 Parallel interface timing (6800-series) (read). 45 Product specification t HD;CE t HD;RW t HD;DC T cyc(DS) t DS(L) t SU;DAT t HD;DAT t DAT;OH PCF8811 MGW755 ...
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... Philips Semiconductors 80 128 pixels matrix LCD driver handbook, full pagewidth D/C, RW D/C E SCE (Write (Read) 2004 May 17 t SU;RW t SU;DC t DS(L) t DAT;ACC Fig.36 Parallel interface timing (6800-series) (write). 46 Product specification t HD;RW t HD;DC T cyc(DS) t DS(H) t SU;DAT t HD;DAT t DAT;OH PCF8811 MGW756 ...
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... May 17 = maximum 9 +85 C; note 1; unless otherwise specified. LCD amb CONDITIONS note 2 note 3 note 4 note 5 note MHz. Series resistance includes ITO track + connector resistance + printed-circuit 47 Product specification PCF8811 MIN. MAX. UNIT 9.00 MHz 111 ...
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... SCLK t S4 SDATA 2004 May PWH1 t H1 Fig.37 3-line serial interface timing PWH1 t H4 Fig.38 4-line serial interface timing. 48 Product specification PCF8811 PWH2 cyc PWH2 cyc t S2 MGW757 MGW758 ...
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... Fig.39 Serial interface timing; read mode SPI 3- or 4-line. handbook, full pagewidth SCE SCLK SDATA SDOUT Fig.40 Serial interface timing; read mode serial interface 3-line. 2004 May Product specification PCF8811 MGW759 MGW760 ...
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... SDAH signal rDA t fall time of the SCLH signal fCL1 2004 May 17 = maximum 9 +85 C; note 1; unless otherwise specified. LCD amb CONDITIONS note 2 note 2 50 Product specification PCF8811 MIN. TYP. MAX. UNIT 0 400 kHz 600 ns 600 ns 1300 ns 600 ...
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... Sr = Start repeated Stop. 2004 May 17 CONDITIONS note 2 note 2 DD1 SU;DAT t SU;STA t HIGH Sr 2 Fig.41 I C-bus timing diagram (Fs-mode). 51 Product specification MIN. TYP. 160 0.1V DD1 0.2V DD1 . t HD;STA SU;STO P PCF8811 MAX. UNIT ns 100 pF 400 BUF S MSC610 ...
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... V DD RES V DD RES 2004 May 17 t rDA t HD;DAT t SU;DAT t fCL (1) t rCL t LOW t LOW t HIGH 2 Fig.42 I C-bus timing diagram (Hs-mode VHRL t RW Fig.43 Reset timing. 52 Product specification t SU;STO t rCL1 (1) t HIGH MGW761 PCF8811 Sr P MGK871 ...
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... Semiconductors are light sensitive. Exposure to light sources can cause malfunction of the IC. In the application it is therefore required to protect the IC from light. The protection has to be done on all sides of the IC, i.e. front, rear and all edges. The pinning of the PCF8811 has an optimum design for single plane wiring e.g. for chip-on-glass display modules. Display size: 80 128 pixels. ...
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... Philips Semiconductors 80 128 pixels matrix LCD driver handbook, full pagewidth Fig.46 Application diagram: external high voltage is used. The required minimum value for the external capacitors in an application with the PCF8811 are 4.7 F depending on the application VLCD and For these capacitors higher values can be used. ...
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... The One Time Programmable (OTP) technology is implemented on the PCF8811. It enables the module maker to program some extended features of the PCF8811 after it has been assembled on an LCD module. Programming is made under the control of the interfaces and the use of one special pin. This pin must be made available on the module glass but need not to be accessed by the set maker ...
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... OTP architecture The OTP circuitry in the PCF8811 contains 9 bits of data: 5 for V calibration (MMVOPCAL), 3 for the temperature LCD coefficient default setting in the basic command set MMTC and 1 seal bit. The circuitry for 1-bit is called an OTP slice. ...
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... INPUT Fig.48 Basic OTP architecture. COMMAND BYTE Product specification SHIFT REGISTER OTP CELLs enter CALMM mode 1 PC1 PC0 1 switch HVgen on/off to force a refresh of the shift register PCF8811 MGU289 ACTION ...
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... The data for the bits is not in the correct shift register position until all bits have been sent. 2004 May assumed that the PCF8811 has just been reset. After transmitting the last bit the PCF8811 can exit or remain in the CALMM mode (see step 1). It should be noted that while in CALMM mode the interface does not recognize commands in the normal sense ...
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... The order for programming cells is not significant. However recommended that the seal bit is programmed last. Once this bit has been programmed it will not be possible to re-enter the CALMM mode assumed that the PCF8811 has just been reset. 59 Product specification PCF8811 ...
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... LCDIN notes 1 and 2 programming inactive; notes 1 and 2 during when programming a LCDIN single bit to logic 1 during OTPPROG 60 Product specification PCF8811 D1 D0 ACTION 0 1 exit power-save wait 5 ms for refresh to take effect 0 1 re-enter Power-down (DON = enter CALMM mode ...
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... The Power-down mode (DON = 0 and DAL = 1) and CALMM mode must be active while the V driven. handbook, full pagewidth SCLK V VOTPPROG V LCDIN 2004 May 17 CONDITIONS prior to OTPPROG after t SU;SCLK t SU;VOTPROG t PW Fig.50 Programming waveforms. 61 Product specification PCF8811 MIN. TYP. MAX 100 120 200 pin is being LCDIN t HD;SCLK t HD;VOTPPROG MGW766 ...
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... Philips Semiconductors 80 128 pixels matrix LCD driver 23 CHIP INFORMATION The PCF8811 is manufactured in n-well CMOS technology. The substrate BONDING PAD LOCATIONS Table 28 Bonding pad information PAD Pad pitch min. 51.84 Pad size (aluminium) 42.84 Bump dimensions 31.9 Wafer thickness (excluding 381 ( 25) bumps) 12.45 mm handbook, halfpage 2 ...
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... V SS1 800 1030 V SS1 638 1030 V SS1 476 1030 V SS1 314 1030 V SS2 152 1030 V SS2 10 +1030 63 Product specification PCF8811 CO-ORDINATES PAD 172 +1030 37 334 +1030 38 550 +1030 39 712 +1030 40 874 +1030 41 928 +1030 42 982 +1030 43 1036 ...
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... R53 5680 +1030 R52 5734 +1030 R51 5788 +1030 R50 5904 +1017 R49 6004 +1030 R48 64 Product specification PCF8811 CO-ORDINATES PAD x y 110 6058 +1030 111 6112 +1030 112 6129.24 1032.5 113 6077.40 1032.5 114 6025.56 1032.5 115 5973 ...
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... PCF8811 y 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032 ...
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... PCF8811 y 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032 ...
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... PCF8811 y 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 1032.5 ...
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... Philips Semiconductors 80 128 pixels matrix LCD driver PCF8811 and V for local tie offs. SS1* DD1* Fig.53 Bonding pad location (viewed from bump side). 2004 May 17 68 Product specification PCF8811 mgw769 ...
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... V DD2 V SS1 V SS2 V LCDIN , V LCDSENSE V SS1 V LCDIN LCD outputs V SS1 V DD1 2 I C-bus pins V SS1 * , SS1 Fig.54 Device protection diagram. 69 Product specification PCF8811 V DD3 V SS1 V LCDOUT V SS1 V DD1 SCLK, SDATA, SDO, SA1, SA0, R/ SS1 V DD1 T3, T4, V SS1 MGW770 ...
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... F 1,y E Fig.55 Tray details. Table 30 Tray dimensions DIM PCF8811 MGW771 y 70 Product specification PCF8811 x,y MGU295 DESCRIPTION pocket pitch; x direction 13.77 mm pocket pitch; y direction 4.45 mm pocket width; x direction 12.55 mm pocket width; y direction 2.41 mm tray width; x direction 50.80 mm tray width; y direction 50.80 mm number of pockets in ...
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... Product specification PCF8811 DEFINITION These products are not Philips Semiconductors ...
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... Philips. This specification can be ordered using the code 9398 393 40011. 2004 May 17 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 72 Product specification PCF8811 2 C patent to use the 2 C specification defined by ...
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Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited ...