pcf8814 NXP Semiconductors, pcf8814 Datasheet - Page 14

• Manufacturer Part Number: pcf8814
• Description: Pcf8814 65 X 96 Pixels Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9
Communication with the microcontroller is achieved via a
clock-synchronized serial peripheral interface.
One of four different serial interfaces may be selected
using the inputs PS1 and PS0; see Table 1.
Table 1 Interface selection
9.1
The Serial Peripheral Interface (SPI) is a 3-line or 4-line
interface for communication between the microcontroller
and the LCD driver chip.
The three lines are: SCE (chip enable), SCLK (serial
clock) and SDIN (serial data). When the 3-line SPI
interface is used the display data/command is controlled
by software.
2003 Mar 13
handbook, full pagewidth
65
PS1
SERIAL INTERFACES
0
0
1
1
Serial peripheral interface
96 pixels matrix LCD driver
SDIN
SCLK
SCE
D/C
PS0
0
1
0
1
3-line SPI
4-line SPI
I
3-line serial interface
2
C-bus
DB7
Fig.12 Serial bus protocol: transmission of one byte.
INTERFACE
DB6
DB5
DB4
14
For the 4-line serial interface the D/C line is added. The
PCF8814 is connected to the serial data I/O of the
microcontroller by two pins: SDIN (data input) and SDO
(data output) connected together.
The timing diagrams for the 3-line and 4-line SPI are
shown in Chapter 15.
9.1.1
The display data/command indication may be controlled
either via software or using the D/C select input. When the
D/C input is used, display data is transmitted when D/C is
HIGH, and command data is transmitted when D/C is LOW
(see Figs 12 and 13). When D/C is not used, the Display
data length instruction is used to indicate that a specific
number of display data bytes (1 to 255) are to be
transmitted (see Fig.14). The next byte after the display
data string is handled as an instruction command.
If SCE is pulled HIGH during a serial display data stream,
the interrupted byte is invalid data but all previously
transmitted data is valid. The next byte received will be
handled as an instruction command. (see Fig.15).
DB3
W
DB2
RITE MODE
DB1
DB0
Objective specification
MBL548
PCF8814