pcf8814 NXP Semiconductors, pcf8814 Datasheet - Page 28

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pcf8814

Manufacturer Part Number
pcf8814
Description
Pcf8814 65 X 96 Pixels Matrix Lcd Driver
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Table 10 Notation used in Table 8
Notes
1. Calibration mode may not be entered if the SEAL bit has been set. Programming is only possible when in calibration
2. If the factory defaults OTP bit has been programmed to 1, then the Set factory defaults instruction is ignored and the
3. These values can set by the module maker. If the factory defaults OTP bit has been set, then these values cannot
2003 Mar 13
DON
E
DAL
MY
PC
DOR
V
BRS
TCE
EC
F1
CALMM
OSE
SFD
N[4:0]
FR[1:0]
SLA[2:0]
SLB[2:0]
SLC[2:0]
SLD[2:0]
BS[2:0]
X[6:0]
Y[3:0]
C[2:0]
P[2:0]
S[1:0]
L[5:0]
Y[3:0]
D[7:0]
VPR[7:0]
65
mode.
device will always use the OTP default data.
be changed via the interface. Otherwise, the OTP data will only be used if the Set factory defaults instruction OTP
bit is set to 1.
BIT
(2)
96 pixels matrix LCD driver
0 = display off; 1 = display on
0 = normal display; 1 = inverse video mode
0 = normal display; 1 = all pixels on
0 = no Y mirroring; 1 = Y mirroring
0 = charge pump off; 1 = charge pump on
0 = normal data order; 1 = MSB/LSB transposed for RAM data
0 = horizontal addressing; 1 = vertical addressing
0 = bottom rows are not mirrored; 1 = bottom rows are mirrored
0 = disable temperature compensation; 1 = enable temperature compensation
0 = use internal oscillator; 1 = use external oscillator
0 = frame inversion disabled and n-line counter runs continuously; 1 = frame
inversion enabled and n-line counter reset
0 = exit OTP calibration mode; 1 = enter OTP calibration mode; see note 1
0 = disable OTP prog. voltage; 1 = enable OTP programming voltage; see note 1
0 = use interface programmed data; 1 = use OTP programmed data
n-line inversion.
set frame frequency
select slope for segment A
select slope for segment B
select slope for segment C
select slope for segment D
bias system selection
sets X address (Column) for writing in the RAM.
sets Y address (Bank) for writing in the RAM
sets the initial R0 of the display.
partial display mode
charge pump multiplication factor
sets line address of the display RAM to be displayed on initial R0
sets Y address bank for RAM writing
display data length for 3-line SPI interface
V
OP
register
DESCRIPTION
28
Objective specification
RESET STATE
0000 0000
PCF8814
0000 0000
0000000
0000000
000000
01101
000
000
000
000
000
0000
1:65
00
000
0
1
00
0
0
1
0
0
0
0
0
1
0
0
0
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)

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