pcf8814 NXP Semiconductors, pcf8814 Datasheet - Page 7

• Manufacturer Part Number: pcf8814
• Description: Pcf8814 65 X 96 Pixels Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7
7.1
An on-chip oscillator provides the clock signal for the
display system; no external components are required.
When the on-chip oscillator is used, the OSC input must be
connected to V
connected to the OSC input.
7.2
The Address Counter (AC) assigns addresses to the
display data RAM for writing. The X-address X[6:0] and the
Y-address Y[3:0] are set separately.
7.3
The PCF8814 contains a 65
stores the display data. The Display Data RAM (DDRAM)
is divided into 9 banks of 96 bytes, although, only one bit
of the 9th bank is used. During RAM access, data is
transferred to the RAM via the serial interface. There is a
direct correspondence between X-address and column
output number.
7.4
The timing generator produces the various signals
required to drive the internal circuitry. Internal chip
operation is not affected by operations on the data bus.
7.5
The display is generated by simultaneously reading out
the RAM content for 2 or 4 rows depending on the current
display size which is selected. This content will be
processed with the corresponding set of 2 or 4 orthogonal
functions thus generating the signals for switching the
pixels of the display on or off according to the RAM
content.
The display status (all dots on/off and normal/inverse
video) is set by the bits DON, DAL and E in the command
“Display control”; see Table 11.
2003 Mar 13
65
FUNCTIONAL DESCRIPTION
Oscillator
Address counter
Display data RAM
Timing generator
Display address counter
96 pixels matrix LCD driver
DD1
. An external clock signal, if used, is
96-bit static RAM which
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7.6
The PCF8814 contains 65 row and 96 column drivers
which connect the appropriate LCD bias voltages in
sequence to the display, in accordance with the data to be
displayed. The number of simultaneously selected rows is
represented by the value ‘p’. In the PCF8814, ‘p’ is set to
4 or 2 automatically, depending on the partial display
mode selected.
8
Data is downloaded in bytes into the DDRAM matrix of the
PCF8814 as indicated in Figs 2 and 3. The display RAM
has a matrix of 65
by the address pointer. The decimal address ranges are:
X = 0 to 95 and Y = 0 to 8. The Y address represents the
bank number. Addresses outside these ranges are not
allowed.
8.1
The mode for storing data into the data RAM is
dependent on:
Horizontal/vertical addressing mode, V
Data order, DOR
Mirror the Y-axis, MY.
ADDRESSING
LCD row and column drivers
Display data RAM structure
96 bits. The columns are addressed
Objective specification
PCF8814