m41t81 STMicroelectronics, m41t81 Datasheet

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m41t81

Manufacturer Part Number
m41t81
Description
Serial Access Real-time Clock With Alarms
Manufacturer
STMicroelectronics
Datasheet

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Feature summary
July 2006
Counters for tenths/hundredths of seconds,
seconds, minutes, hours, day, date, month,
year, and century
32KHz crystal oscillator integrating load
capacitance (12.5pF) providing exceptional
oscillator stability and high crystal series
resistance operation
Serial interface supports I
protocol)
Ultra-low battery supply current of 0.6µA
(typ@3V)
2.0 to 5.5V clock operating voltage
Automatic switch-over and deselect circuitry
(for 3V application select M41T81S data sheet)
Power-down time stamp (HT bit) allowing
determination of time elapsed in battery back
up
Programmable alarm and interrupt function
(valid even during battery back-up mode)
Accurate programmable watchdog timer (from
62.5ms to 128s)
Software clock calibration to compensate
crystal deviation due to temperature
Operating temperature of –40 to 85°C
ECOPACK® package available
2
C bus (400kHz
Serial access Real-Time Clock with alarm
Rev 8
8-pin SOIC
SO8 (M)
8
1
M41T81
www.st.com
1/30
1

Related parts for m41t81

m41t81 Summary of contents

Page 1

... Ultra-low battery supply current of 0.6µA (typ@3V) ■ 2.0 to 5.5V clock operating voltage ■ Automatic switch-over and deselect circuitry (for 3V application select M41T81S data sheet) ■ Power-down time stamp (HT bit) allowing determination of time elapsed in battery back up ■ Programmable alarm and interrupt function (valid even during battery back-up mode) ■ ...

Page 2

... Square wave output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.7 Century bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.8 Output driver pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.9 Preferred initial power-on default . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6 Package mechanical information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2/30 Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 M41T81 ...

Page 3

... M41T81 List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 2. Clock register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 3. Alarm repeat modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 4. Square wave output frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 5. Preferred default values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 6. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 7. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 8. Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 9. DC characteristics Table 10. Crystal electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 11 ...

Page 4

... Figure 10. Crystal accuracy across temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11. Clock calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 12. Alarm interrupt reset waveform Figure 13. Back-up mode alarm waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 14. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 15. Power down/up mode AC waveforms Figure 16. Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 17. SO8 – 8-lead plastic small package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4/30 M41T81 ...

Page 5

... M41T81 1 Summary description The M41T81 is a low power Serial RTC with a built-in 32.768kHz oscillator (external crystal controlled). Eight bytes of the SRAM (see for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 12 bytes of SRAM provide status/control of Alarm, Watchdog and Square Wave functions ...

Page 6

... Oscillator input Oscillator output Interrupt / output driver / frequency test / square wave (open drain) Serial data input/output Serial clock input Battery supply voltage Supply voltage Ground No connect No function IRQ/FT/OUT/SQW M41T81 SCL BAT 4 5 SDA V SS M41T81 AI04769 ...

Page 7

... M41T81 Figure 3. Block diagram CRYSTAL SDA SCL BAT ( Open drain output 2. Square Wave function has the highest priority on IRQ/FT/OUT/SQW output – 0.5V (typ) SO BAT REAL TIME CLOCK CALENDAR 32KHz RTC W/ALARM OSCILLATOR & CALIBRATION WATCHDOG INTERFACE ...

Page 8

... Operation 2 Operation The M41T81 clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 20 bytes contained in the device can then be accessed sequentially in the following order: st ● 1 Byte: tenths/hundredths of a second register nd ● ...

Page 9

... M41T81 2.1.2 Start data transfer A change in the state of the data line, from high to Low, while the clock is High, defines the START condition. 2.1.3 Stop data transfer A change in the state of the data line, from Low to High, while the clock is High, defines the STOP condition. ...

Page 10

... Acknowledge Bit to the slave transmitter. The address pointer is only incremented on reception of an Acknowledge Clock. The M41T81 slave transmitter will now place the data byte at address An+1 on the bus, the master receiver reads and acknowledges the new byte and the address pointer is incremented to “ ...

Page 11

... M41T81 An alternate READ Mode may also be implemented whereby the master reads the M41T81 slave without first writing to the (volatile) address pointer. The first address that is read is the last one stored in the pointer (see Figure 6. Slave address location Figure 7. READ mode sequence ...

Page 12

... Operation 2.3 WRITE mode In this mode the master transmitter transmits to the M41T81 slave receiver. Bus protocol is shown in Figure 9 on page (R/W=0) is placed on the bus and indicates to the addressed device that word address “An” will follow and written to the on-chip address pointer. The data word to be written to the memory is strobed in next and the internal address pointer is incremented to the next address location on the reception of an acknowledge clock ...

Page 13

... AN1572. 3.2 Clock registers The M41T81 offers 20 internal registers which contain Clock, Alarm, Watchdog, Flag, Square Wave and Control data. These registers are memory locations which contain external (user accessible) and internal copies of the data (usually referred to as BiPORT cells). The external copies are independent of internal functions except that they are updated periodically by the simultaneous transfer of the incremented internal copy ...

Page 14

... RS0 0 0 Function/range BCD format D1 D0 Seconds Seconds Minutes Century/ hours Day of week Day Date Month Month Year Year Control RB1 RB0 Watchdog Al month Al date Al hour Al min Al sec 0 0 Flags 0 0 Reserved 0 0 Reserved 0 0 Reserved 0 0 SQW M41T81 00-99 00-59 00-59 0-1/00-23 01-7 01-31 01-12 00-99 01-12 01-31 00-23 00-59 00-59 ...

Page 15

... M41T81 3.3 Calibrating the clock The M41T81 is driven by a quartz controlled oscillator with a nominal frequency of 32,768Hz. The devices are tested not exceed ±35 ppm (parts per million) oscillator frequency error at 25 Figure 10 on page improves to better than ±2 ppm at 25°C. The oscillation rate of crystals changes with temperature. The M41T81 design employs periodic counter correction ...

Page 16

... Figure 11. Clock calibration NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION 16/30 ∆ – –0.036 ppm/° –20 – Temperature ° ± 0.006 ppm/°C = 25°C ± 5° AI07888 M41T81 CC AI00594B ...

Page 17

... It can also be programmed to go off while the M41T81 is in the battery back-up mode to serve as a system wake-up call. Bits RPT5-RPT1 put the alarm in the repeat mode of operation. ...

Page 18

... Watchdog Register = 3* seconds). If the processor does not reset the timer within the specified period, the M41T81 sets the WDF (Watchdog Flag) and generates a watchdog interrupt. The watchdog timer can be reset by having the microprocessor perform a WRITE of the Watchdog Register ...

Page 19

... M41T81 3.6 Square wave output The M41T81 offers the user a programmable square wave function which is output on the SQW pin. RS3-RS0 bits located in 13h establish the square wave output frequency. These frequencies are listed in completed, the IRQ/FT/OUT/SQW pin can be turned on and off under software control with the Square Wave Enable Bit (SQWE) located in Register 0Ah ...

Page 20

... Table 5. Preferred default values Condition (2) Initial power-up Subsequent power-up (with (3) battery back-up) 1. BMB0-BMB4, RB0, RB1. 2. State of other control bits undefined unchanged 20/30 Table 5 on page 20 Out WATCHDOG FT AFE SQWE ABE register M41T81 ( ...

Page 21

... M41T81 4 Maximum rating Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied ...

Page 22

... Effective capacitance measured with power supply at 5V; sampled only, not 100% tested 25° 1MHz. 3. Outputs deselected. 22/30 Parameter ) ) 0.8V CC 0.2V CC (1) (2) Parameter Input capacitance Output capacitance Low-pass filter input time constant (SDA and SCL) M41T81 (1) M41T81 2.0 to 5.5V –40 to 85°C 100pF ≤ 50ns 0. 0. 0.7V CC 0.3V CC AI02568 Min Max Unit 7 pF ...

Page 23

... KDS can be contacted at kouhou@kdsj.co.jp or http://www.kdsj.co.jp for further information on this crystal type. 2. Load capacitors are integrated within the M41T81. Circuit board layout considerations for the 32.768kHz crystal of minimum trace lengths and isolation from RF generating signals should be taken into account. Figure 15. Power down/up mode AC waveforms ...

Page 24

... A CC (1) (2) Parameter –40 to 85° 2.0 to 5.5V (except where noted tHD:STA tR tF tHIGH S tLOW tHD:DAT Min Typ Max 0 10 Min Typ Max – 0.80 V – 0.50 V – 0.30 BAT BAT BAT tHD:STA tSU:DAT tSU:STA SR M41T81 Unit nS µS Unit V tSU:STO P AI00589 ...

Page 25

... M41T81 Table 13. AC characteristics Sym f SCL clock frequency SCL t Clock low period LOW t Clock high period HIGH t SDA and SCL rise time R t SDA and SCL fall time F START condition hold time t (after this period the first clock pulse is HD:STA generated) ...

Page 26

... These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK trademark. ECOPACK specifications are available at: www.st.com. 26/30 M41T81 ...

Page 27

... M41T81 Figure 17. SO8 – 8-lead plastic small package outline A2 1. Drawing is not to scale. Table 14. SO8 – 8-lead plastic small outline (150 mils body width), package mechanical data Symbol ccc ccc Millimeters Typ ...

Page 28

... Shipping method For SO8 ECOPACK® package, standard package F = ECOPACK® package, tape & reel 24mm packing For other options, or for more information on any aspect of this device, please contact the ST Sales Office nearest you. 28/30 M41T 81 M M41T81 6 E ...

Page 29

... M41T81 8 Revision history Table 16. Revision history Date December 2001 21-Jan-02 01-May-02 05-Jun-02 10-Jun-02 03-Jul-02 11-Oct-02 21-Jan-03 05-Mar-03 12-Sep-03 27-Apr-04 17-Jun-04 7-Sep-04 13-Sep-04 03-Jun-05 12-Jul-2006 Revision 1.0 First issue 1.1 Fix table footnotes (Table 1.2 Modify reflow time and temperature footnote 1.3 Modify data retention text, trip points 1 ...

Page 30

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 30/30 Please Read Carefully: © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com M41T81 ...

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